diff -Nrcpad gcc-15-20260821/ChangeLog gcc-15-20260828/ChangeLog
*** gcc-15-20260821/ChangeLog	Fri Aug 21 22:32:06 2026
--- gcc-15-20260828/ChangeLog	Fri Aug 28 22:32:05 2026
***************
*** 1,3 ****
--- 1,8 ----
+ 2026-08-27  Michael Meissner  <meissner@linux.ibm.com>
+ 
+ 	* MAINTAINERS: Update Michael Meissner's information.
+ 	Backported from master from 2026-08-07.
+ 
  2026-06-12  Release Manager
  
  	* GCC 15.3.0 released.
diff -Nrcpad gcc-15-20260821/LAST_UPDATED gcc-15-20260828/LAST_UPDATED
*** gcc-15-20260821/LAST_UPDATED	Fri Aug 21 22:32:23 2026
--- gcc-15-20260828/LAST_UPDATED	Fri Aug 28 22:32:23 2026
***************
*** 1 ****
! Obtained from git: releases/gcc-15 revision f4f08e3db2d888d25707feb609e4aa5beac46678
--- 1 ----
! Obtained from git: releases/gcc-15 revision 4b59b2b568de130e95f4d132d9773375d357a7b4
diff -Nrcpad gcc-15-20260821/MAINTAINERS gcc-15-20260828/MAINTAINERS
*** gcc-15-20260821/MAINTAINERS	Fri Aug 21 22:32:06 2026
--- gcc-15-20260828/MAINTAINERS	Fri Aug 28 22:32:05 2026
*************** Richard Earnshaw
*** 36,42 ****
  Jakub Jelinek                                   <jakub@redhat.com>
  Richard Kenner                                  <kenner@nyu.edu>
  Jeff Law                                        <jlaw@ventanamicro.com>
! Michael Meissner                                <gnu@the-meissners.org>
  Jason Merrill                                   <jason@redhat.com>
  David S. Miller                                 <davem@redhat.com>
  Joseph Myers                                    <josmyers@redhat.com>
--- 36,42 ----
  Jakub Jelinek                                   <jakub@redhat.com>
  Richard Kenner                                  <kenner@nyu.edu>
  Jeff Law                                        <jlaw@ventanamicro.com>
! Michael Meissner                                <meissner@gcc.gnu.org>
  Jason Merrill                                   <jason@redhat.com>
  David S. Miller                                 <davem@redhat.com>
  Joseph Myers                                    <josmyers@redhat.com>
*************** libphobos               Iain Buclaw
*** 198,204 ****
  line map                Dodji Seketeli          <dodji@redhat.com>
  soft-fp                 Joseph Myers            <josmyers@redhat.com>
  scheduler (+ haifa)     Jim Wilson              <wilson@tuliptree.org>
- scheduler (+ haifa)     Michael Meissner        <gnu@the-meissners.org>
  scheduler (+ haifa)     Jeff Law                <jeffreyalaw@gmail.com>
  scheduler (+ haifa)     Vladimir Makarov        <vmakarov@redhat.com>
  modulo-scheduler        Roman Zhuykov           <zhroma@ispras.ru>
--- 198,203 ----
*************** Roland McGrath                  roland
*** 668,674 ****
  Bryce McKinlay                  bryce           <mckinlay@redhat.com>
  Adam Megacz                     -               <adam@xwt.org>
  Bingfeng Mei                    meibf           <bmei@broadcom.com>
! Michael Meissner                meissner        <gnu@the-meissners.org>
  Josef Melcr                     -               <melcrjos@fit.cvut.cz>
  Jason Merrill                   jason           <jason@redhat.com>
  Jim Meyering                    -               <jim@meyering.net>
--- 667,673 ----
  Bryce McKinlay                  bryce           <mckinlay@redhat.com>
  Adam Megacz                     -               <adam@xwt.org>
  Bingfeng Mei                    meibf           <bmei@broadcom.com>
! Michael Meissner                meissner        <meissner@gcc.gnu.org>
  Josef Melcr                     -               <melcrjos@fit.cvut.cz>
  Jason Merrill                   jason           <jason@redhat.com>
  Jim Meyering                    -               <jim@meyering.net>
diff -Nrcpad gcc-15-20260821/MD5SUMS gcc-15-20260828/MD5SUMS
*** gcc-15-20260821/MD5SUMS	Fri Aug 21 22:32:28 2026
--- gcc-15-20260828/MD5SUMS	Fri Aug 28 22:32:27 2026
***************
*** 1,5 ****
  # This file contains the MD5 checksums of the files in the
! # gcc-15-20260821.tar.xz tarball.
  #
  # Besides verifying that all files in the tarball were correctly expanded,
  # it also can be used to determine if any files have changed since the
--- 1,5 ----
  # This file contains the MD5 checksums of the files in the
! # gcc-15-20260828.tar.xz tarball.
  #
  # Besides verifying that all files in the tarball were correctly expanded,
  # it also can be used to determine if any files have changed since the
*************** b8acb527560fc760209d200fcfab8ff4  .githu
*** 21,32 ****
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--- 21,32 ----
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*** 514,520 ****
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*** 563,569 ****
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--- 563,569 ----
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*************** eb0642ebe2b75475e73f7ae765d24bd2  gcc/ad
*** 755,761 ****
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--- 755,761 ----
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*************** f43b68e01b2d61fffb5336ef45fa1e7f  gcc/co
*** 3770,3776 ****
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--- 3770,3776 ----
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*************** b70722da9a66a8346a6d8a03a411a0fc  gcc/co
*** 4619,4625 ****
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  f973e381561e255314508a55abacf3fa  gcc/config/mips/mips-modes.def
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--- 4619,4625 ----
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*************** f973e381561e255314508a55abacf3fa  gcc/co
*** 4627,4633 ****
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--- 4627,4633 ----
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*************** cd13b51383c99c08d86250b61fed3805  gcc/co
*** 4903,4909 ****
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--- 4903,4909 ----
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*************** df5aee4609e79571271b2b8143c3da05  gcc/co
*** 5075,5081 ****
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--- 5075,5081 ----
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*************** adbb131725969c4ea0811f86eeb9de8d  gcc/co
*** 5124,5132 ****
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--- 5124,5132 ----
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*************** f11925c88524d2fd457bf77944da1302  gcc/co
*** 5166,5172 ****
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--- 5166,5172 ----
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*************** d7112093049d4abbc421609d032b7358  gcc/co
*** 5225,5231 ****
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--- 5225,5231 ----
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*************** dd688bee93aa1ea7f9a6353393a3549d  gcc/ex
*** 6046,6052 ****
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--- 6046,6052 ----
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*************** a798cdca802a57ffa3473ab610b37c86  gcc/fo
*** 6063,6069 ****
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--- 6063,6069 ----
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*************** bd08c55098f00394b9922e6163c27b92  gcc/fo
*** 6117,6123 ****
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--- 6117,6123 ----
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*************** d3d6074e5bf4591d5ad4f10d2e4ef053  gcc/gi
*** 6286,6292 ****
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--- 6286,6292 ----
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*************** a5461dd81ec55dc6f56817a1f356f345  gcc/pr
*** 7793,7799 ****
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--- 7793,7799 ----
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*************** af420d569eb72f885f4375e275545070  gcc/ta
*** 8450,8456 ****
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*************** f2e2a6171e51d284aef6b4356f338ad3  gcc/te
*** 12392,12397 ****
--- 12392,12398 ----
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*************** a1d5220e55816987e989ecef9b9914ad  gcc/te
*** 37720,37725 ****
--- 37721,37727 ----
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*************** f93ef0cccc28030d91ef7db3de43152e  gcc/te
*** 43970,43976 ****
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--- 43972,43978 ----
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*************** c24af1592de8918050b279c29b0300ce  gcc/te
*** 50054,50060 ****
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--- 50056,50064 ----
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*************** e2a142dab1f38e7f7a8ffcdce454ce29  gcc/te
*** 53836,53842 ****
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--- 53840,53849 ----
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*************** ef9f94de68c006babcf9169489ed1b51  gcc/te
*** 56153,56158 ****
--- 56160,56166 ----
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*************** ebbf958a9ec613b0e83f39734d21b008  gcc/te
*** 73496,73501 ****
--- 73504,73510 ----
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*************** a8f9adaf01b9c4605ccf3a2b91395d9a  gcc/te
*** 85800,85806 ****
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--- 85809,85815 ----
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*************** deb12224fed195721b2ddc8b70e46a23  gcc/te
*** 86797,86803 ****
--- 86806,86815 ----
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*************** adff3606ba35a019752b04f06365d9ae  gcc/te
*** 87132,87137 ****
--- 87144,87150 ----
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*************** f2efb1e403760ba651384395f140d44c  gcc/te
*** 89250,89255 ****
--- 89263,89270 ----
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*************** ddd06bb7aa032539e1d7f788e2ddb31f  gcc/te
*** 94135,94140 ****
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*************** c91185a3ccff03eaf3228522d82e998b  gcc/te
*** 101013,101018 ****
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*** 111314,111319 ****
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*************** b639e95e2056957733aa779c0c757061  gcc/te
*** 112460,112465 ****
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*** 118439,118445 ****
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*** 118517,118527 ****
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*************** cffdeae41b78da05839b193e90188f55  libcod
*** 118903,118909 ****
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*************** a0d37c297f3d462529b502a4e1bd2378  libcpp
*** 118929,118935 ****
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--- 118948,118954 ----
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*************** b38cbc5c54988720ae33d36a2ff78fd3  libgcc
*** 119573,119579 ****
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*************** b9901623ec29c1c4dd98d6fae040518c  libgcc
*** 119581,119587 ****
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*************** d680e7307fb59fe24f8431e179191f16  libssp
*** 132611,132617 ****
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--- 132630,132636 ----
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*************** d0ccdc68b53e4f9522c73c04bfb81928  libstd
*** 134042,134048 ****
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*************** f6c79e469ea2b0dddd1990749fa4b787  libstd
*** 141598,141603 ****
--- 141617,141623 ----
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diff -Nrcpad gcc-15-20260821/gcc/ChangeLog gcc-15-20260828/gcc/ChangeLog
*** gcc-15-20260821/gcc/ChangeLog	Fri Aug 21 22:32:06 2026
--- gcc-15-20260828/gcc/ChangeLog	Fri Aug 28 22:32:06 2026
***************
*** 1,3 ****
--- 1,99 ----
+ 2026-08-27  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	Backported from master:
+ 	2026-08-07  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR tree-optimization/126534
+ 	* gimple-range-op.cc (cfn_sqrt::op1_range): Widen lb or ub
+ 	by further 0.5ulp or 1ulp before squaring it.
+ 	* range-op-float.cc (float_widen_lhs_range): No longer static.
+ 
+ 2026-08-27  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	Backported from master:
+ 	2026-08-07  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR target/126667
+ 	* config/s390/s390.md (usubc<mode>5): If operands[4] is
+ 	an immediate operand other than const0_rtx, force it into reg
+ 	before using it in xor<mode>3 insn.
+ 
+ 2026-08-27  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	Backported from master:
+ 	2026-08-04  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR tree-optimization/126601
+ 	* tree-ssa-math-opts.cc (maybe_optimize_guarding_check): Use safe_push
+ 	on mul_stmts rather than quick_push.
+ 
+ 2026-08-27  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	Backported from master:
+ 	2026-08-04  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR tree-optimization/126564
+ 	* tree-ssa-phiopt.cc (spaceship_replacement): Fix up condition
+ 	when to punt because of redundant cmp1 with cmp2, xor in
+ 	lhs1 == lhs2 with difference of cmp2 from cmp1 (ignoring
+ 	LT_EXPR vs. LE_EXPR and GT_EXPR vs. GE_EXPR differences) and
+ 	1 if cond2_phi_edge is EDGE_FALSE_VALUE.
+ 
+ 2026-08-27  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	Backported from master:
+ 	2026-08-03  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR target/126484
+ 	* config/mips/mips-ftypes.def (MIPS_SI_FTYPE_VOID,
+ 	MIPS_USI_FTYPE_VOID): Use DEF_MIPS_FTYPE with 0 as
+ 	first argument rather than 1 and leave out ", VOID" from
+ 	second argument.
+ 	* config/mips/mips.cc (MIPS_FTYPE_NAME0): Define.
+ 	(MIPS_FTYPE_ATYPES0): Define.
+ 
+ 2026-08-26  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	PR ada/125984
+ 	* tree-dfa.cc (get_ref_base_and_extent) <ARRAY_REF>: Use the range
+ 	of the difference between the index expression and the low bound,
+ 	instead of that of the index expression itself, to constrain the
+ 	maximum size of the access.
+ 
+ 2026-08-24  Jin Ma  <jinma@linux.alibaba.com>
+ 
+ 	Backported from master:
+ 	2026-08-21  Jin Ma  <jinma@linux.alibaba.com>
+ 
+ 	PR target/126873
+ 	* config/riscv/autovec.md (vec_set<mode>): Zero-extend a
+ 	sub-Pmode index to Pmode.
+ 	(vec_extract<mode><vel>): Likewise.
+ 
+ 2026-08-24  Jeff Law  <jeffrey.law@oss.qualcomm.com>
+ 
+ 	Backported from master:
+ 	2026-08-14  Jeff Law  <jeffrey.law@oss.qualcomm.com>
+ 
+ 	PR rtl-optimization/126426
+ 	* ext-dce.cc (carry_backpropagate): Return a conservatively
+ 	correct mask when presented with vector modes.
+ 	(ext_dce_process_uses): Don't use GET_MODE_INNER, we need to
+ 	know the full extent of the bits for vector and complex modes.
+ 
+ 2026-08-24  Georg-Johann Lay  <avr@gjlay.de>
+ 
+ 	Backported from master:
+ 	2026-08-23  Georg-Johann Lay  <avr@gjlay.de>
+ 
+ 	PR target/127004
+ 	* config/avr/avr-passes.cc (rtl-iter.h): Include.
+ 	(insninfo_t::scratch_mask): New method.
+ 	(optimize_data_t::try_split_ldi): Use it for ignore_mask.
+ 	(optimize_data_t::try_split_any): Same.
+ 	(optimize_data_t::emit_sequence): Dump ignore_mask prior to
+ 	calling fatal_insn.
+ 
  2026-08-20  Hongyu Wang  <hongyu.wang@intel.com>
  
  	Backported from master:
diff -Nrcpad gcc-15-20260821/gcc/DATESTAMP gcc-15-20260828/gcc/DATESTAMP
*** gcc-15-20260821/gcc/DATESTAMP	Fri Aug 21 22:32:06 2026
--- gcc-15-20260828/gcc/DATESTAMP	Fri Aug 28 22:32:06 2026
***************
*** 1 ****
! 20260821
--- 1 ----
! 20260828
diff -Nrcpad gcc-15-20260821/gcc/ada/ChangeLog gcc-15-20260828/gcc/ada/ChangeLog
*** gcc-15-20260821/gcc/ada/ChangeLog	Fri Aug 21 22:32:06 2026
--- gcc-15-20260828/gcc/ada/ChangeLog	Fri Aug 28 22:32:06 2026
***************
*** 1,3 ****
--- 1,19 ----
+ 2026-08-26  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	PR ada/127026
+ 	* exp_aggr.adb (Must_Slide): Check for the unconstrained case only
+ 	after all the negative tests.
+ 
+ 2026-08-24  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	PR ada/127026
+ 	* exp_aggr.adb (Must_Slide): Reorder parameters, rename Obj_Type to
+ 	Ob_Typ and add Assign boolean parameter.  Return Assign's value in
+ 	the case where Obj_Typ is unconstrained.
+ 	(Build_Array_Aggr_Code): Adjust call to Must_Slide.
+ 	(In_Place_Assign_OK): Likewise.
+ 	(Expand_Array_Aggregate): Likewise.
+ 
  2026-08-02  Eric Botcazou  <ebotcazou@adacore.com>
  
  	PR ada/126553
diff -Nrcpad gcc-15-20260821/gcc/ada/exp_aggr.adb gcc-15-20260828/gcc/ada/exp_aggr.adb
*** gcc-15-20260821/gcc/ada/exp_aggr.adb	Fri Aug 21 22:32:06 2026
--- gcc-15-20260828/gcc/ada/exp_aggr.adb	Fri Aug 28 22:32:06 2026
*************** package body Exp_Aggr is
*** 141,159 ****
     --  constants that are done in place.
  
     function Must_Slide
!      (Aggr     : Node_Id;
!       Obj_Type : Entity_Id;
!       Typ      : Entity_Id) return Boolean;
     --  A static array aggregate in an object declaration can in most cases be
     --  expanded in place. The one exception is when the aggregate is given
     --  with component associations that specify different bounds from those of
     --  the type definition in the object declaration. In this pathological
     --  case the aggregate must slide, and we must introduce an intermediate
!    --  temporary to hold it.
!    --
!    --  The same holds in an assignment to multi-dimensional arrays, when
!    --  components may be given with bounds that differ from those of the
!    --  component type.
  
     function Number_Of_Choices (N : Node_Id) return Nat;
     --  Returns the number of discrete choices (not including the others choice
--- 141,162 ----
     --  constants that are done in place.
  
     function Must_Slide
!      (Aggr    : Node_Id;
!       Typ     : Entity_Id;
!       Obj_Typ : Entity_Id;
!       Assign  : Boolean) return Boolean;
!    --  Return whether an array aggregate Aggr whose subtype is Typ must slide
!    --  when assigned to an object whose (nominal) subtype is Obj_Typ. Assign
!    --  is True when the context is an assignment statement and False when it
!    --  is an object declaration or an allocator.
! 
     --  A static array aggregate in an object declaration can in most cases be
     --  expanded in place. The one exception is when the aggregate is given
     --  with component associations that specify different bounds from those of
     --  the type definition in the object declaration. In this pathological
     --  case the aggregate must slide, and we must introduce an intermediate
!    --  temporary to hold it. The same holds in an assignment, when components
!    --  may be given with bounds that differ from those of the target.
  
     function Number_Of_Choices (N : Node_Id) return Nat;
     --  Returns the number of discrete choices (not including the others choice
*************** package body Exp_Aggr is
*** 1424,1430 ****
                 if Nkind (Parent (N)) = N_Assignment_Statement
                   and then Is_Array_Type (Comp_Typ)
                   and then Present (Component_Associations (Expr_Q))
!                  and then Must_Slide (N, Comp_Typ, Etype (Expr_Q))
                 then
                    Set_Expansion_Delayed (Expr_Q, False);
                    Set_Analyzed (Expr_Q, False);
--- 1427,1434 ----
                 if Nkind (Parent (N)) = N_Assignment_Statement
                   and then Is_Array_Type (Comp_Typ)
                   and then Present (Component_Associations (Expr_Q))
!                  and then
!                    Must_Slide (N, Etype (Expr_Q), Comp_Typ, Assign => True)
                 then
                    Set_Expansion_Delayed (Expr_Q, False);
                    Set_Analyzed (Expr_Q, False);
*************** package body Exp_Aggr is
*** 4145,4151 ****
        --  statically equal to those of the target.
  
        if Is_Array
!         and then Must_Slide (N, Etype (Name (Parent_Node)), Etype (N))
        then
           return False;
        end if;
--- 4149,4156 ----
        --  statically equal to those of the target.
  
        if Is_Array
!         and then
!           Must_Slide (N, Etype (N), Etype (Name (Parent_Node)), Assign => True)
        then
           return False;
        end if;
*************** package body Exp_Aggr is
*** 6171,6178 ****
                         or else Needs_Finalization (Typ)
                         or else not Must_Slide
                                       (N,
                                        Designated_Type (Etype (Parent_Node)),
!                                       Typ)))
  
           --  Object declaration (see Convert_Aggr_In_Object_Decl). Sliding
           --  cannot be done in place for the time being.
--- 6176,6184 ----
                         or else Needs_Finalization (Typ)
                         or else not Must_Slide
                                       (N,
+                                       Typ,
                                        Designated_Type (Etype (Parent_Node)),
!                                       Assign => False)))
  
           --  Object declaration (see Convert_Aggr_In_Object_Decl). Sliding
           --  cannot be done in place for the time being.
*************** package body Exp_Aggr is
*** 6186,6194 ****
                                   (Defining_Identifier (Parent_Node))
                         or else not Must_Slide
                                       (N,
                                        Etype
                                          (Defining_Identifier (Parent_Node)),
!                                       Typ)))
  
           --  Safe assignment (see Convert_Aggr_In_Assignment). So far only the
           --  assignments in init procs are taken into account, as well those
--- 6192,6201 ----
                                   (Defining_Identifier (Parent_Node))
                         or else not Must_Slide
                                       (N,
+                                       Typ,
                                        Etype
                                          (Defining_Identifier (Parent_Node)),
!                                       Assign => False)))
  
           --  Safe assignment (see Convert_Aggr_In_Assignment). So far only the
           --  assignments in init procs are taken into account, as well those
*************** package body Exp_Aggr is
*** 9377,9410 ****
     ----------------
  
     function Must_Slide
!      (Aggr     : Node_Id;
!       Obj_Type : Entity_Id;
!       Typ      : Entity_Id) return Boolean
     is
     begin
!       --  No sliding if the type of the object is not established yet, if it is
!       --  an unconstrained type whose actual subtype comes from the aggregate,
!       --  or if the two types are identical. If the aggregate contains only
!       --  an Others_Clause it gets its type from the context and no sliding
!       --  is involved either.
! 
!       if not Is_Array_Type (Obj_Type) then
!          return False;
  
!       elsif not Is_Constrained (Obj_Type) then
           return False;
  
!       elsif Typ = Obj_Type then
           return False;
  
        elsif Is_Others_Aggregate (Aggr) then
           return False;
  
        --  Check if sliding is required
  
        else
           declare
!             Obj_Index  : Node_Id := First_Index (Obj_Type);
              Obj_Bounds : Range_Nodes;
              Typ_Index  : Node_Id := First_Index (Typ);
              Typ_Bounds : Range_Nodes;
--- 9384,9418 ----
     ----------------
  
     function Must_Slide
!      (Aggr    : Node_Id;
!       Typ     : Entity_Id;
!       Obj_Typ : Entity_Id;
!       Assign  : Boolean) return Boolean
     is
     begin
!       --  No sliding if the type of the object is not established yet, or if
!       --  the two types are identical. And if the aggregate contains only an
!       --  Others_Clause, it gets its type from the context and no sliding is
!       --  involved either. When the type of the object is unconstrained, no
!       --  sliding either if its actual subtype comes from the aggregate.
  
!       if not Is_Array_Type (Obj_Typ) then
           return False;
  
!       elsif Typ = Obj_Typ then
           return False;
  
        elsif Is_Others_Aggregate (Aggr) then
           return False;
  
+       elsif not Is_Constrained (Obj_Typ) then
+          return Assign;
+ 
        --  Check if sliding is required
  
        else
           declare
!             Obj_Index  : Node_Id := First_Index (Obj_Typ);
              Obj_Bounds : Range_Nodes;
              Typ_Index  : Node_Id := First_Index (Typ);
              Typ_Bounds : Range_Nodes;
diff -Nrcpad gcc-15-20260821/gcc/config/avr/avr-passes.cc gcc-15-20260828/gcc/config/avr/avr-passes.cc
*** gcc-15-20260821/gcc/config/avr/avr-passes.cc	Fri Aug 21 22:32:07 2026
--- gcc-15-20260828/gcc/config/avr/avr-passes.cc	Fri Aug 28 22:32:07 2026
***************
*** 28,33 ****
--- 28,34 ----
  #include "backend.h"
  #include "target.h"
  #include "rtl.h"
+ #include "rtl-iter.h"
  #include "tree.h"
  #include "diagnostic-core.h"
  #include "cfghooks.h"
*************** struct insninfo_t
*** 1053,1058 ****
--- 1054,1081 ----
      else
        gcc_unreachable ();
    }
+ 
+   gprmask_t scratch_mask () const
+   {
+     gprmask_t mask = m_scratch
+       ? regmask (m_scratch, 1)
+       : 0;
+ 
+     if (m_insn)
+       {
+ 	subrtx_iterator::array_type array;
+ 	FOR_EACH_SUBRTX (iter, array, PATTERN (m_insn), NONCONST)
+ 	  {
+ 	    rtx scratch_reg;
+ 	    if (GET_CODE (*iter) == CLOBBER
+ 		&& REG_P (scratch_reg = XEXP (*iter, 0))
+ 		&& END_REGNO (scratch_reg) <= REG_32)
+ 	      mask |= regmask (scratch_reg);
+ 	  }
+       }
+ 
+     return mask;
+   }
  }; // insninfo_t
  
  
*************** optimize_data_t::emit_sequence (basic_bl
*** 1186,1191 ****
--- 1209,1215 ----
  	  avr_dump ("INCOMPLETE APPLICATION:\n");
  	  m2.dump ("regs old route=%s\n\n");
  	  n2.dump ("regs new route=%s\n\n");
+ 	  avr_dump ("ignore_mask = %08x\n\n", (unsigned) ignore_mask);
  	  avr_dump ("The new insns are:\n%L", insns);
  
  	  fatal_insn ("incomplete application of insn", insns);
*************** optimize_data_t::try_split_ldi (bbinfo_t
*** 2714,2721 ****
  
        n_new_insns = bbinfo_t::fpd->solution.emit_insns (curr.ii, curr.regs);
  
!       if (curr.ii.m_scratch)
! 	ignore_mask = regmask (curr.ii.m_scratch, 1);
      }
  
    return found;
--- 2738,2744 ----
  
        n_new_insns = bbinfo_t::fpd->solution.emit_insns (curr.ii, curr.regs);
  
!       ignore_mask = curr.ii.scratch_mask ();
      }
  
    return found;
*************** optimize_data_t::try_split_any (bbinfo_t
*** 3056,3063 ****
  	return fail ("too expensive");
      }
  
!   if (ii.m_scratch)
!     ignore_mask = regmask (ii.m_scratch, 1);
  
    return true;
  }
--- 3079,3085 ----
  	return fail ("too expensive");
      }
  
!   ignore_mask = ii.scratch_mask ();
  
    return true;
  }
diff -Nrcpad gcc-15-20260821/gcc/config/mips/mips-ftypes.def gcc-15-20260828/gcc/config/mips/mips-ftypes.def
*** gcc-15-20260821/gcc/config/mips/mips-ftypes.def	Fri Aug 21 22:32:07 2026
--- gcc-15-20260828/gcc/config/mips/mips-ftypes.def	Fri Aug 28 22:32:07 2026
*************** DEF_MIPS_FTYPE (1, (SI, V4QI))
*** 75,81 ****
  DEF_MIPS_FTYPE (2, (SI, V4QI, V4QI))
  DEF_MIPS_FTYPE (2, (SI, V4SI, UQI))
  DEF_MIPS_FTYPE (2, (SI, V8HI, UQI))
! DEF_MIPS_FTYPE (1, (SI, VOID))
  
  DEF_MIPS_FTYPE (2, (UDI, UDI, UDI))
  DEF_MIPS_FTYPE (2, (UDI, UV2SI, UV2SI))
--- 75,81 ----
  DEF_MIPS_FTYPE (2, (SI, V4QI, V4QI))
  DEF_MIPS_FTYPE (2, (SI, V4SI, UQI))
  DEF_MIPS_FTYPE (2, (SI, V8HI, UQI))
! DEF_MIPS_FTYPE (0, (SI))
  
  DEF_MIPS_FTYPE (2, (UDI, UDI, UDI))
  DEF_MIPS_FTYPE (2, (UDI, UV2SI, UV2SI))
*************** DEF_MIPS_FTYPE (2, (UDI, V2DI, UQI))
*** 84,90 ****
  DEF_MIPS_FTYPE (2, (USI, V16QI, UQI))
  DEF_MIPS_FTYPE (2, (USI, V4SI, UQI))
  DEF_MIPS_FTYPE (2, (USI, V8HI, UQI))
! DEF_MIPS_FTYPE (1, (USI, VOID))
  
  DEF_MIPS_FTYPE (2, (UV16QI, UV16QI, UQI))
  DEF_MIPS_FTYPE (2, (UV16QI, UV16QI, UV16QI))
--- 84,90 ----
  DEF_MIPS_FTYPE (2, (USI, V16QI, UQI))
  DEF_MIPS_FTYPE (2, (USI, V4SI, UQI))
  DEF_MIPS_FTYPE (2, (USI, V8HI, UQI))
! DEF_MIPS_FTYPE (0, (USI))
  
  DEF_MIPS_FTYPE (2, (UV16QI, UV16QI, UQI))
  DEF_MIPS_FTYPE (2, (UV16QI, UV16QI, UV16QI))
diff -Nrcpad gcc-15-20260821/gcc/config/mips/mips.cc gcc-15-20260828/gcc/config/mips/mips.cc
*** gcc-15-20260821/gcc/config/mips/mips.cc	Fri Aug 21 22:32:07 2026
--- gcc-15-20260828/gcc/config/mips/mips.cc	Fri Aug 28 22:32:07 2026
*************** enum mips_ucbranch_type
*** 211,216 ****
--- 211,217 ----
  };
  
  /* Macros to create an enumeration identifier for a function prototype.  */
+ #define MIPS_FTYPE_NAME0(A) MIPS_##A##_FTYPE_VOID
  #define MIPS_FTYPE_NAME1(A, B) MIPS_##A##_FTYPE_##B
  #define MIPS_FTYPE_NAME2(A, B, C) MIPS_##A##_FTYPE_##B##_##C
  #define MIPS_FTYPE_NAME3(A, B, C, D) MIPS_##A##_FTYPE_##B##_##C##_##D
*************** mips_build_cvpointer_type (void)
*** 17115,17120 ****
--- 17116,17124 ----
  
  /* MIPS_FTYPE_ATYPESN takes N MIPS_FTYPES-like type codes and lists
     their associated MIPS_ATYPEs.  */
+ #define MIPS_FTYPE_ATYPES0(A) \
+   MIPS_ATYPE_##A
+ 
  #define MIPS_FTYPE_ATYPES1(A, B) \
    MIPS_ATYPE_##A, MIPS_ATYPE_##B
  
diff -Nrcpad gcc-15-20260821/gcc/config/riscv/autovec.md gcc-15-20260828/gcc/config/riscv/autovec.md
*** gcc-15-20260821/gcc/config/riscv/autovec.md	Fri Aug 21 22:32:07 2026
--- gcc-15-20260828/gcc/config/riscv/autovec.md	Fri Aug 28 22:32:07 2026
***************
*** 1385,1391 ****
  
        /* Here we set VL = offset + 1.  */
        rtx length = gen_reg_rtx (Pmode);
!       operands[2] = gen_lowpart (Pmode, operands[2]);
        if (CONST_INT_P (operands[2]))
  	  emit_move_insn (length, GEN_INT (INTVAL (operands[2]) + 1));
        else
--- 1385,1391 ----
  
        /* Here we set VL = offset + 1.  */
        rtx length = gen_reg_rtx (Pmode);
!       operands[2] = convert_to_mode (Pmode, operands[2], true);
        if (CONST_INT_P (operands[2]))
  	  emit_move_insn (length, GEN_INT (INTVAL (operands[2]) + 1));
        else
***************
*** 1442,1448 ****
  
      /* Emit the slide down to index 0 in a new vector.  */
      tmp = gen_reg_rtx (<MODE>mode);
!     operands[2] = gen_lowpart (Pmode, operands[2]);
      rtx ops[] = {tmp, operands[1], operands[2]};
      riscv_vector::emit_vlmax_insn
        (code_for_pred_slide (UNSPEC_VSLIDEDOWN, <MODE>mode),
--- 1442,1448 ----
  
      /* Emit the slide down to index 0 in a new vector.  */
      tmp = gen_reg_rtx (<MODE>mode);
!     operands[2] = convert_to_mode (Pmode, operands[2], true);
      rtx ops[] = {tmp, operands[1], operands[2]};
      riscv_vector::emit_vlmax_insn
        (code_for_pred_slide (UNSPEC_VSLIDEDOWN, <MODE>mode),
diff -Nrcpad gcc-15-20260821/gcc/config/rs6000/linux64.h gcc-15-20260828/gcc/config/rs6000/linux64.h
*** gcc-15-20260821/gcc/config/rs6000/linux64.h	Fri Aug 21 22:32:07 2026
--- gcc-15-20260828/gcc/config/rs6000/linux64.h	Fri Aug 28 22:32:07 2026
*************** extern int dot_symbols;
*** 564,570 ****
  
  /* Enable using prefixed PC-relative addressing on POWER10 if the ABI
     supports it.  The ELF v2 ABI only supports PC-relative relocations for
!    the medium code model.  */
  #define PCREL_SUPPORTED_BY_OS	(TARGET_POWER10 && TARGET_PREFIXED	\
  				 && ELFv2_ABI_CHECK			\
! 				 && TARGET_CMODEL == CMODEL_MEDIUM)
--- 564,571 ----
  
  /* Enable using prefixed PC-relative addressing on POWER10 if the ABI
     supports it.  The ELF v2 ABI only supports PC-relative relocations for
!    the medium/large code models.  */
  #define PCREL_SUPPORTED_BY_OS	(TARGET_POWER10 && TARGET_PREFIXED	\
  				 && ELFv2_ABI_CHECK			\
! 				 && (TARGET_CMODEL == CMODEL_MEDIUM	\
! 				     || TARGET_CMODEL == CMODEL_LARGE))
diff -Nrcpad gcc-15-20260821/gcc/config/rs6000/rs6000.cc gcc-15-20260828/gcc/config/rs6000/rs6000.cc
*** gcc-15-20260821/gcc/config/rs6000/rs6000.cc	Fri Aug 21 22:32:07 2026
--- gcc-15-20260828/gcc/config/rs6000/rs6000.cc	Fri Aug 28 22:32:07 2026
*************** rs6000_option_override_internal (bool gl
*** 4361,4372 ****
        && (rs6000_isa_flags_explicit & OPTION_MASK_PCREL) == 0)
      rs6000_isa_flags |= OPTION_MASK_PCREL;
  
!   /* -mpcrel requires -mcmodel=medium, but we can't check TARGET_CMODEL until
!       after the subtarget override options are done.  */
!   else if (TARGET_PCREL && TARGET_CMODEL != CMODEL_MEDIUM)
      {
        if ((rs6000_isa_flags_explicit & OPTION_MASK_PCREL) != 0)
! 	error ("%qs requires %qs", "-mpcrel", "-mcmodel=medium");
  
        rs6000_isa_flags &= ~OPTION_MASK_PCREL;
      }
--- 4361,4375 ----
        && (rs6000_isa_flags_explicit & OPTION_MASK_PCREL) == 0)
      rs6000_isa_flags |= OPTION_MASK_PCREL;
  
!   /* -mpcrel requires medium or large code models, but we can't check
!       TARGET_CMODEL until after the subtarget override options are done.  */
!   else if (TARGET_PCREL
! 	   && TARGET_CMODEL != CMODEL_MEDIUM
! 	   && TARGET_CMODEL != CMODEL_LARGE)
      {
        if ((rs6000_isa_flags_explicit & OPTION_MASK_PCREL) != 0)
! 	error ("%qs requires %qs or %qs", "-mpcrel", "-mcmodel=medium",
! 	       "-mcmodel=large");
  
        rs6000_isa_flags &= ~OPTION_MASK_PCREL;
      }
*************** rs6000_elf_declare_function_name (FILE *
*** 21347,21353 ****
    ASM_OUTPUT_TYPE_DIRECTIVE (file, name, "function");
    ASM_DECLARE_RESULT (file, DECL_RESULT (decl));
  
!   if (TARGET_CMODEL == CMODEL_LARGE
        && rs6000_global_entry_point_prologue_needed_p ())
      {
        char buf[256];
--- 21350,21356 ----
    ASM_OUTPUT_TYPE_DIRECTIVE (file, name, "function");
    ASM_DECLARE_RESULT (file, DECL_RESULT (decl));
  
!   if (TARGET_CMODEL == CMODEL_LARGE && !TARGET_PCREL
        && rs6000_global_entry_point_prologue_needed_p ())
      {
        char buf[256];
diff -Nrcpad gcc-15-20260821/gcc/config/rs6000/rs6000.md gcc-15-20260828/gcc/config/rs6000/rs6000.md
*** gcc-15-20260821/gcc/config/rs6000/rs6000.md	Fri Aug 21 22:32:07 2026
--- gcc-15-20260828/gcc/config/rs6000/rs6000.md	Fri Aug 28 22:32:07 2026
***************
*** 970,975 ****
--- 970,1044 ----
     (set_attr "length" "4,8")])
  
  
+ ;; On power10, optimize zero extending a QI/HI/SI/DImode value from memory that
+ ;; is going to a vector register target by generating a LXVR{B,H,W,D}X
+ ;; instruction without creating the TImode value in a GPR and using MTVSRDD to
+ ;; move it to the vector register.
+ (define_peephole2
+   [(set (match_operand:DI 0 "int_reg_operand")
+ 	(match_operand:DI 1 "memory_operand"))
+    (set (match_operand:DI 2 "base_reg_operand")
+ 	(const_int 0))
+    (set (match_operand:TI 3 "vsx_register_operand")
+ 	(match_operand:TI 4 "int_reg_operand"))]
+   "TARGET_POWER10 && TARGET_POWERPC64
+    && (reg_or_subregno (operands[0])
+        == reg_or_subregno (operands[4]) + !!WORDS_BIG_ENDIAN)
+    && (reg_or_subregno (operands[2])
+        == reg_or_subregno (operands[4]) + !WORDS_BIG_ENDIAN)
+    && peep2_reg_dead_p (3, operands[4])
+    && (REG_P (XEXP (operands[1], 0))
+        || SUBREG_P (XEXP (operands[1], 0))
+        || GET_CODE (XEXP (operands[1], 0)) == PLUS)"
+   [(set (match_dup 3)
+ 	(zero_extend:TI (match_dup 5)))]
+ {
+   rtx mem = operands[1];
+   rtx addr = XEXP (mem, 0);
+ 
+   if (indexed_or_indirect_address (addr, DImode))
+     operands[5] = mem;
+   else
+     {
+       rtx op2 = operands[2];
+       emit_insn (gen_rtx_SET (op2, addr));
+       operands[5] = change_address (mem, DImode, op2);
+     }
+ })
+ 
+ (define_peephole2
+   [(set (match_operand:DI 0 "int_reg_operand")
+ 	(zero_extend:DI
+ 	 (match_operand:QHSI 1 "memory_operand")))
+    (set (match_operand:DI 2 "base_reg_operand")
+ 	(const_int 0))
+    (set (match_operand:TI 3 "vsx_register_operand")
+ 	(match_operand:TI 4 "int_reg_operand"))]
+   "TARGET_POWER10 && TARGET_POWERPC64
+    && (reg_or_subregno (operands[0])
+        == reg_or_subregno (operands[4]) + !!WORDS_BIG_ENDIAN)
+    && (reg_or_subregno (operands[2])
+        == reg_or_subregno (operands[4]) + !WORDS_BIG_ENDIAN)
+    && peep2_reg_dead_p (3, operands[4])
+    && (REG_P (XEXP (operands[1], 0))
+        || SUBREG_P (XEXP (operands[1], 0))
+        || GET_CODE (XEXP (operands[1], 0)) == PLUS)"
+   [(set (match_dup 3)
+ 	(zero_extend:TI (match_dup 5)))]
+ {
+   rtx mem = operands[1];
+   rtx addr = XEXP (mem, 0);
+ 
+   if (indexed_or_indirect_address (addr, DImode))
+     operands[5] = mem;
+   else
+     {
+       rtx op2 = operands[2];
+       emit_insn (gen_rtx_SET (op2, addr));
+       operands[5] = change_address (mem, DImode, op2);
+     }
+ })
+ 
  (define_insn "zero_extendsi<mode>2"
    [(set (match_operand:EXTSI 0 "gpc_reg_operand" "=r,r,d,wa,wa,r,wa")
  	(zero_extend:EXTSI (match_operand:SI 1 "reg_or_mem_operand" "m,r,?Z,?Z,r,wa,wa")))]
diff -Nrcpad gcc-15-20260821/gcc/config/rs6000/vsx.md gcc-15-20260828/gcc/config/rs6000/vsx.md
*** gcc-15-20260821/gcc/config/rs6000/vsx.md	Fri Aug 21 22:32:07 2026
--- gcc-15-20260828/gcc/config/rs6000/vsx.md	Fri Aug 28 22:32:07 2026
***************
*** 4798,4803 ****
--- 4798,4821 ----
    "lxvdsx %x0,%y1"
    [(set_attr "type" "vecload")])
  
+ ;; Optimize SPLAT of an extract from a V2DF/V2DI vector with a constant element
+ (define_insn "*vsx_splat_extract_<mode>"
+   [(set (match_operand:VSX_D 0 "vsx_register_operand" "=wa")
+ 	(vec_duplicate:VSX_D
+ 	 (vec_select:<VEC_base>
+ 	  (match_operand:VSX_D 1 "vsx_register_operand" "wa")
+ 	  (parallel [(match_operand 2 "const_0_to_1_operand" "n")]))))]
+   "VECTOR_MEM_VSX_P (<MODE>mode)"
+ {
+   int which_word = INTVAL (operands[2]);
+   if (!BYTES_BIG_ENDIAN)
+     which_word = 1 - which_word;
+ 
+   operands[3] = GEN_INT (which_word ? 3 : 0);
+   return "xxpermdi %x0,%x1,%x1,%3";
+ }
+   [(set_attr "type" "vecperm")])
+ 
  ;; V4SI splat support
  (define_insn "vsx_splat_v4si"
    [(set (match_operand:V4SI 0 "vsx_register_operand" "=wa,wa")
***************
*** 6264,6270 ****
     (SFBOOL_MFVSR_A		 3)		;; move to gpr src
     (SFBOOL_BOOL_D		 4)		;; and/ior/xor dest
     (SFBOOL_BOOL_A1		 5)		;; and/ior/xor arg1
!    (SFBOOL_BOOL_A2		 6)		;; and/ior/xor arg1
     (SFBOOL_SHL_D		 7)		;; shift left dest
     (SFBOOL_SHL_A		 8)		;; shift left arg
     (SFBOOL_MTVSR_D		 9)		;; move to vecter dest
--- 6282,6288 ----
     (SFBOOL_MFVSR_A		 3)		;; move to gpr src
     (SFBOOL_BOOL_D		 4)		;; and/ior/xor dest
     (SFBOOL_BOOL_A1		 5)		;; and/ior/xor arg1
!    (SFBOOL_BOOL_A2		 6)		;; and/ior/xor arg2
     (SFBOOL_SHL_D		 7)		;; shift left dest
     (SFBOOL_SHL_A		 8)		;; shift left arg
     (SFBOOL_MTVSR_D		 9)		;; move to vecter dest
***************
*** 6304,6321 ****
  ;; GPR, and instead move the integer mask value to the vector register after a
  ;; shift and do the VSX logical operation.
  
! ;; The insns for dealing with SFmode in GPR registers looks like:
  ;; (set (reg:V4SF reg2) (unspec:V4SF [(reg:SF reg1)] UNSPEC_VSX_CVDPSPN))
  ;;
! ;; (set (reg:DI reg3) (unspec:DI [(reg:V4SF reg2)] UNSPEC_P8V_RELOAD_FROM_VSX))
  ;;
! ;; (set (reg:DI reg4) (and:DI (reg:DI reg3) (reg:DI reg3)))
  ;;
  ;; (set (reg:DI reg5) (ashift:DI (reg:DI reg4) (const_int 32)))
  ;;
  ;; (set (reg:SF reg6) (unspec:SF [(reg:DI reg5)] UNSPEC_P8V_MTVSRD))
  ;;
! ;; (set (reg:SF reg6) (unspec:SF [(reg:SF reg6)] UNSPEC_VSX_CVSPDPN))
  
  (define_peephole2
    [(match_scratch:DI SFBOOL_TMP_GPR "r")
--- 6322,6339 ----
  ;; GPR, and instead move the integer mask value to the vector register after a
  ;; shift and do the VSX logical operation.
  
! ;; The insns for dealing with SFmode in GPR registers looks like on power8:
  ;; (set (reg:V4SF reg2) (unspec:V4SF [(reg:SF reg1)] UNSPEC_VSX_CVDPSPN))
  ;;
! ;; (set (reg:DI reg3) (zero_extend:DI (reg:SI reg2)))
  ;;
! ;; (set (reg:DI reg4) (and:SI (reg:SI reg3) (reg:SI mask)))
  ;;
  ;; (set (reg:DI reg5) (ashift:DI (reg:DI reg4) (const_int 32)))
  ;;
  ;; (set (reg:SF reg6) (unspec:SF [(reg:DI reg5)] UNSPEC_P8V_MTVSRD))
  ;;
! ;; (set (reg:SF reg7) (unspec:SF [(reg:SF reg6)] UNSPEC_VSX_CVSPDPN))
  
  (define_peephole2
    [(match_scratch:DI SFBOOL_TMP_GPR "r")
***************
*** 6396,6401 ****
--- 6414,6551 ----
    operands[SFBOOL_MTVSR_D_V4SF] = gen_rtx_REG (V4SFmode, regno_mtvsr_d);
  })
  
+ ;; Constants for SFbool optimization on power9/power10
+ (define_constants
+   [(SFBOOL2_TMP_VSX_V4SI	 0)		;; vector temporary (V4SI)
+    (SFBOOL2_TMP_GPR_SI		 1)		;; GPR temporary (SI)
+    (SFBOOL2_MFVSR_D		 2)		;; move to gpr dest (DI)
+    (SFBOOL2_MFVSR_A		 3)		;; move to gpr src (SI)
+    (SFBOOL2_BOOL_D		 4)		;; and/ior/xor dest (SI)
+    (SFBOOL2_BOOL_A1		 5)		;; and/ior/xor arg1 (SI)
+    (SFBOOL2_BOOL_A2		 6)		;; and/ior/xor arg2 (SI)
+    (SFBOOL2_SPLAT_D		 7)		;; splat dest (V4SI)
+    (SFBOOL2_MTVSR_D		 8)		;; move/splat to VSX dest.
+    (SFBOOL2_MTVSR_A		 9)		;; move/splat to VSX arg.
+    (SFBOOL2_MFVSR_A_V4SI	10)		;; MFVSR_A as V4SI
+    (SFBOOL2_MTVSR_D_V4SI	11)		;; MTVSR_D as V4SI
+    (SFBOOL2_XXSPLTW		12)])		;; 1 or 3 for XXSPLTW
+ 
+ ;; On power9/power10, the code is different because we have a splat 32-bit
+ ;; operation that does a direct move to the FPR/vector registers (MTVSRWS).
+ ;;
+ ;; The insns for dealing with SFmode in GPR registers looks like on
+ ;; power9/power10:
+ ;;
+ ;; (set (reg:V4SF reg2) (unspec:V4SF [(reg:SF reg1)] UNSPEC_VSX_CVDPSPN))
+ ;;
+ ;; (set (reg:DI reg3) (zero_extend:DI (reg:SI reg2)))
+ ;;
+ ;; (set (reg:SI reg4) (and:SI (reg:SI reg3) (reg:SI mask)))
+ ;;
+ ;; (set (reg:V4SI reg5) (vec_duplicate:V4SI (reg:SI reg4)))
+ ;;
+ ;; (set (reg:SF reg6) (unspec:SF [(reg:SF reg5)] UNSPEC_VSX_CVSPDPN))
+ 
+ ;; The VSX temporary needs to be an Altivec register in case we are trying to
+ ;; do and/ior/xor of -16..15 and we want to use VSPLTISW to load the constant.
+ ;;
+ ;; The GPR temporary is only used if we are trying to do a logical operation
+ ;; with a constant outside of the -16..15 range on a power9.  Otherwise, we can
+ ;; load the constant directly into the VSX temporary register.
+ 
+ (define_peephole2
+   [(match_scratch:V4SI SFBOOL2_TMP_VSX_V4SI "v")
+    (match_scratch:SI SFBOOL2_TMP_GPR_SI "r")
+ 
+    ;; Zero_extend and direct move
+    (set (match_operand:DI SFBOOL2_MFVSR_D "int_reg_operand")
+ 	(zero_extend:DI
+ 	 (match_operand:SI SFBOOL2_MFVSR_A "vsx_register_operand")))
+ 
+    ;; AND/IOR/XOR operation on int
+    (set (match_operand:SI SFBOOL2_BOOL_D "int_reg_operand")
+ 	(and_ior_xor:SI
+ 	 (match_operand:SI SFBOOL2_BOOL_A1 "int_reg_operand")
+ 	 (match_operand:SI SFBOOL2_BOOL_A2 "reg_or_cint_operand")))
+ 
+    ;; Splat sfbool result to vector register
+    (set (match_operand:V4SI SFBOOL2_SPLAT_D "vsx_register_operand")
+ 	(vec_duplicate:V4SI
+ 	 (match_dup SFBOOL2_BOOL_D)))]
+ 
+   "TARGET_POWERPC64 && TARGET_P9_VECTOR
+    && REG_P (operands[SFBOOL2_MFVSR_D])
+    && REG_P (operands[SFBOOL2_BOOL_A1])
+    && (REGNO (operands[SFBOOL2_MFVSR_D]) == REGNO (operands[SFBOOL2_BOOL_A1])
+        || (REG_P (operands[SFBOOL2_BOOL_A2])
+            && (REGNO (operands[SFBOOL2_MFVSR_D])
+                == REGNO (operands[SFBOOL2_BOOL_A2]))))
+    && peep2_reg_dead_p (3, operands[SFBOOL2_MFVSR_D])
+    && peep2_reg_dead_p (4, operands[SFBOOL2_BOOL_D])"
+ 
+   ;; Either (set (reg:SI xxx) (reg:SI yyy))	or
+   ;;        (set (reg:V4SI xxx) (const_vector (parallel [c, c, c, c])))
+   [(set (match_dup SFBOOL2_MTVSR_D)
+ 	(match_dup SFBOOL2_MTVSR_A))
+ 
+    ;; And/ior/xor on vector registers
+    (set (match_dup SFBOOL2_TMP_VSX_V4SI)
+ 	(and_ior_xor:V4SI
+ 	 (match_dup SFBOOL2_MFVSR_A_V4SI)
+ 	 (match_dup SFBOOL2_TMP_VSX_V4SI)))
+ 
+    ;; XXSPLTW t,r,r,1
+    (set (match_dup SFBOOL2_SPLAT_D)
+ 	(vec_duplicate:V4SI
+ 	 (vec_select:SI
+ 	  (match_dup SFBOOL2_TMP_VSX_V4SI)
+ 	  (parallel [(match_dup SFBOOL2_XXSPLTW)]))))]
+ {
+   rtx mfvsr_d = operands[SFBOOL2_MFVSR_D];
+   rtx bool_a1 = operands[SFBOOL2_BOOL_A1];
+   rtx bool_a2 = operands[SFBOOL2_BOOL_A2];
+   rtx bool_arg = (rtx_equal_p (mfvsr_d, bool_a1) ? bool_a2 : bool_a1);
+   int regno_mfvsr_a = REGNO (operands[SFBOOL2_MFVSR_A]);
+   int regno_tmp_vsx = REGNO (operands[SFBOOL2_TMP_VSX_V4SI]);
+ 
+   /* If the logical operation is a constant, form the constant in a vector
+      register.  */
+   if (CONST_INT_P (bool_arg))
+     {
+       HOST_WIDE_INT value = INTVAL (bool_arg);
+ 
+       /* See if we can directly load the constant, either by VSPLTIW or by
+          XXSPLTIW on power10.  */
+ 
+       if (IN_RANGE (value, -16, 15) || TARGET_PREFIXED)
+ 	{
+ 	  rtvec cv = gen_rtvec (4, bool_arg, bool_arg, bool_arg, bool_arg);
+ 	  operands[SFBOOL2_MTVSR_D] = gen_rtx_REG (V4SImode, regno_tmp_vsx);
+ 	  operands[SFBOOL2_MTVSR_A] = gen_rtx_CONST_VECTOR (V4SImode, cv);
+ 	}
+ 
+       else
+ 	{
+ 	  /* We need to load up the constant to a GPR and move it to a
+ 	     vector register.  */
+ 	  rtx tmp_gpr = operands[SFBOOL2_TMP_GPR_SI];
+ 	  emit_move_insn (tmp_gpr, bool_arg);
+ 	  operands[SFBOOL2_MTVSR_D] = gen_rtx_REG (SImode, regno_tmp_vsx);
+ 	  operands[SFBOOL2_MTVSR_A] = tmp_gpr;
+ 	}
+     }
+   else
+     {
+       /* Mask is in a register, move it to a vector register.  */
+       operands[SFBOOL2_MTVSR_D] = gen_rtx_REG (SImode, regno_tmp_vsx);
+       operands[SFBOOL2_MTVSR_A] = bool_arg;
+     }
+ 
+     operands[SFBOOL2_TMP_VSX_V4SI] = gen_rtx_REG (V4SImode, regno_tmp_vsx);
+     operands[SFBOOL2_MFVSR_A_V4SI] = gen_rtx_REG (V4SImode, regno_mfvsr_a);
+     operands[SFBOOL2_XXSPLTW] = GEN_INT (BYTES_BIG_ENDIAN ? 1 : 2);
+ })
+ 
  ;; Support signed/unsigned long long to float conversion vectorization.
  ;; Note that any_float (pc) here is just for code attribute <su>.
  (define_expand "vec_pack<su>_float_v2di"
diff -Nrcpad gcc-15-20260821/gcc/config/s390/s390.md gcc-15-20260828/gcc/config/s390/s390.md
*** gcc-15-20260821/gcc/config/s390/s390.md	Fri Aug 21 22:32:07 2026
--- gcc-15-20260828/gcc/config/s390/s390.md	Fri Aug 28 22:32:07 2026
***************
*** 7119,7125 ****
    else
      {
        rtx tmp = gen_reg_rtx (<MODE>mode);
!       emit_insn (gen_xor<mode>3 (tmp, operands[4], const1_rtx));
        rtx slb_cond = s390_emit_compare (<MODE>mode, LEU, tmp, const0_rtx);
        emit_insn (gen_sub<mode>3_slb_borrow1_cc (operands[0], operands[2], operands[3], slb_cond));
      }
--- 7119,7127 ----
    else
      {
        rtx tmp = gen_reg_rtx (<MODE>mode);
!       emit_insn (gen_xor<mode>3 (tmp, CONSTANT_P (operands[4])
! 				      ? force_reg (<MODE>mode, operands[4])
! 				      : operands[4], const1_rtx));
        rtx slb_cond = s390_emit_compare (<MODE>mode, LEU, tmp, const0_rtx);
        emit_insn (gen_sub<mode>3_slb_borrow1_cc (operands[0], operands[2], operands[3], slb_cond));
      }
diff -Nrcpad gcc-15-20260821/gcc/ext-dce.cc gcc-15-20260828/gcc/ext-dce.cc
*** gcc-15-20260821/gcc/ext-dce.cc	Fri Aug 21 22:32:08 2026
--- gcc-15-20260828/gcc/ext-dce.cc	Fri Aug 28 22:32:08 2026
*************** carry_backpropagate (unsigned HOST_WIDE_
*** 498,504 ****
    if (mask == 0)
      return 0;
  
!   enum machine_mode mode = GET_MODE_INNER (GET_MODE (x));
    unsigned HOST_WIDE_INT mmask = GET_MODE_MASK (mode);
  
    /* While we don't try to optimize operations on types larger
--- 498,520 ----
    if (mask == 0)
      return 0;
  
!   /* Consider a vector operation, the bits live are the element bits live
!      broadcasted across the vector.  So there can be holes (consider a
!      logical shift).
! 
!      Vector modes aren't likely to represent cases we can optimize with
!      any regularity.  It seems sensible to just punt that case in a
!      conservatively correct way.
! 
!      The conservatively corect choice here would be to return the mode
!      mask for the outer mode.  We're already doing that for modes larger
!      than HOST_BITS_PER_WIDE_INT, so it should be safe for larger vectors
!      as well as something like V2HI.  */
!   if (VECTOR_MODE_P (GET_MODE (x)) || COMPLEX_MODE_P (GET_MODE (x)))
!     return GET_MODE_MASK (GET_MODE (x));
!     
! 
!   enum machine_mode mode = GET_MODE (x);
    unsigned HOST_WIDE_INT mmask = GET_MODE_MASK (mode);
  
    /* While we don't try to optimize operations on types larger
*************** carry_backpropagate (unsigned HOST_WIDE_
*** 572,577 ****
--- 588,598 ----
  	  || !GET_MODE_BITSIZE (GET_MODE (XEXP (x, 0))).is_constant ())
  	return -1;
  
+       /* See note about vector modes near the start of this function.  */
+       if (VECTOR_MODE_P (GET_MODE (XEXP (x, 0)))
+ 	  || COMPLEX_MODE_P (GET_MODE (XEXP (x, 0))))
+ 	return GET_MODE_MASK (GET_MODE (XEXP (x, 0)));
+ 
        /* We want the mode of the inner object.  We need to ensure its
  	 sign bit is on in MASK.  */
        mode = GET_MODE_INNER (GET_MODE (XEXP (x, 0)));
*************** ext_dce_process_uses (rtx_insn *insn, rt
*** 707,713 ****
  		{
  		  rtx inner = XEXP (src, 0);
  		  unsigned HOST_WIDE_INT src_mask
! 		    = GET_MODE_MASK (GET_MODE_INNER (GET_MODE (inner)));
  
  		  /* DST_MASK could be zero if we had something in the SET
  		     that we couldn't handle.  */
--- 728,734 ----
  		{
  		  rtx inner = XEXP (src, 0);
  		  unsigned HOST_WIDE_INT src_mask
! 		    = GET_MODE_MASK (GET_MODE (inner));
  
  		  /* DST_MASK could be zero if we had something in the SET
  		     that we couldn't handle.  */
*************** ext_dce_process_uses (rtx_insn *insn, rt
*** 805,812 ****
  			 propagate destination liveness through, then just
  			 set the mask to the mode's mask.  */
  		      if (!safe_for_live_propagation (code))
! 			tmp_mask
! 			  = GET_MODE_MASK (GET_MODE_INNER (GET_MODE (y)));
  
  		      if (tmp_mask & 0xff)
  			bitmap_set_bit (livenow, rn);
--- 826,832 ----
  			 propagate destination liveness through, then just
  			 set the mask to the mode's mask.  */
  		      if (!safe_for_live_propagation (code))
! 			tmp_mask = GET_MODE_MASK (GET_MODE (y));
  
  		      if (tmp_mask & 0xff)
  			bitmap_set_bit (livenow, rn);
diff -Nrcpad gcc-15-20260821/gcc/fortran/ChangeLog gcc-15-20260828/gcc/fortran/ChangeLog
*** gcc-15-20260821/gcc/fortran/ChangeLog	Fri Aug 21 22:32:08 2026
--- gcc-15-20260828/gcc/fortran/ChangeLog	Fri Aug 28 22:32:08 2026
***************
*** 1,3 ****
--- 1,13 ----
+ 2026-08-26  Harald Anlauf  <anlauf@gmx.de>
+ 
+ 	Backported from master:
+ 	2026-07-08  Harald Anlauf  <anlauf@gmx.de>
+ 
+ 	PR fortran/126127
+ 	* interface.cc (find_symtree0): Check for NULL pointer.
+ 	(gfc_find_sym_in_symtree): Also search user-defined operator list
+ 	when the symbol refers to a function.
+ 
  2026-08-16  Paul Thomas  <pault@gcc.gnu.org>
  
  	Backported from master:
diff -Nrcpad gcc-15-20260821/gcc/fortran/interface.cc gcc-15-20260828/gcc/fortran/interface.cc
*** gcc-15-20260821/gcc/fortran/interface.cc	Fri Aug 21 22:32:08 2026
--- gcc-15-20260828/gcc/fortran/interface.cc	Fri Aug 28 22:32:08 2026
*************** find_symtree0 (gfc_symtree *root, gfc_sy
*** 4703,4709 ****
  {
    gfc_symtree * st;
  
!   if (root->n.sym == sym)
      return root;
  
    st = NULL;
--- 4703,4709 ----
  {
    gfc_symtree * st;
  
!   if (root == NULL || root->n.sym == sym)
      return root;
  
    st = NULL;
*************** gfc_find_sym_in_symtree (gfc_symbol *sym
*** 4736,4741 ****
--- 4736,4749 ----
        st = find_symtree0 (ns->sym_root, sym);
        if (st)
  	return st;
+ 
+       /* Search user-defined operators.  */
+       if (ns->uop_root && sym->attr.function)
+ 	{
+ 	  st = find_symtree0 (ns->uop_root, sym);
+ 	  if (st)
+ 	    return st;
+ 	}
      }
    gfc_internal_error ("Unable to find symbol %qs", sym->name);
    /* Not reached.  */
diff -Nrcpad gcc-15-20260821/gcc/gimple-range-op.cc gcc-15-20260828/gcc/gimple-range-op.cc
*** gcc-15-20260821/gcc/gimple-range-op.cc	Fri Aug 21 22:32:08 2026
--- gcc-15-20260828/gcc/gimple-range-op.cc	Fri Aug 28 22:32:08 2026
*************** frange_mpfr_arg1 (REAL_VALUE_TYPE *res_l
*** 461,466 ****
--- 461,468 ----
    return true;
  }
  
+ extern frange float_widen_lhs_range (tree, const frange &);
+ 
  class cfn_sqrt : public range_operator
  {
  public:
*************** public:
*** 567,573 ****
  	  frange_nextafter (TYPE_MODE (type), lb, dconstninf);
  	if (real_less (&dconst0, &lb))
  	  {
! 	    REAL_VALUE_TYPE op = lb;
  	    frange_arithmetic (MULT_EXPR, type, lb, op, op, dconstninf);
  	  }
  	else
--- 569,578 ----
  	  frange_nextafter (TYPE_MODE (type), lb, dconstninf);
  	if (real_less (&dconst0, &lb))
  	  {
! 	    frange wlhs (type, lb, dconstinf);
! 	    wlhs.clear_nan ();
! 	    REAL_VALUE_TYPE op
! 	      = float_widen_lhs_range (type, wlhs).lower_bound ();
  	    frange_arithmetic (MULT_EXPR, type, lb, op, op, dconstninf);
  	  }
  	else
*************** public:
*** 581,587 ****
  	  frange_nextafter (TYPE_MODE (type), ub, dconstinf);
  	if (real_isfinite (&ub))
  	  {
! 	    REAL_VALUE_TYPE op = ub;
  	    frange_arithmetic (MULT_EXPR, type, ub, op, op, dconstinf);
  	  }
  	else
--- 586,595 ----
  	  frange_nextafter (TYPE_MODE (type), ub, dconstinf);
  	if (real_isfinite (&ub))
  	  {
! 	    frange wlhs (type, dconstninf, ub);
! 	    wlhs.clear_nan ();
! 	    REAL_VALUE_TYPE op
! 	      = float_widen_lhs_range (type, wlhs).upper_bound ();
  	    frange_arithmetic (MULT_EXPR, type, ub, op, op, dconstinf);
  	  }
  	else
diff -Nrcpad gcc-15-20260821/gcc/range-op-float.cc gcc-15-20260828/gcc/range-op-float.cc
*** gcc-15-20260821/gcc/range-op-float.cc	Fri Aug 21 22:32:10 2026
--- gcc-15-20260828/gcc/range-op-float.cc	Fri Aug 28 22:32:10 2026
*************** zero_to_inf_range (REAL_VALUE_TYPE &lb,
*** 2365,2371 ****
     So, for op1_range/op2_range extend the lhs range by 1ulp (or 0.5ulp)
     in each direction.  See PR109008 for more details.  */
  
! static frange
  float_widen_lhs_range (tree type, const frange &lhs)
  {
    frange ret = lhs;
--- 2365,2371 ----
     So, for op1_range/op2_range extend the lhs range by 1ulp (or 0.5ulp)
     in each direction.  See PR109008 for more details.  */
  
! frange
  float_widen_lhs_range (tree type, const frange &lhs)
  {
    frange ret = lhs;
diff -Nrcpad gcc-15-20260821/gcc/testsuite/ChangeLog gcc-15-20260828/gcc/testsuite/ChangeLog
*** gcc-15-20260821/gcc/testsuite/ChangeLog	Fri Aug 21 22:32:10 2026
--- gcc-15-20260828/gcc/testsuite/ChangeLog	Fri Aug 28 22:32:10 2026
***************
*** 1,3 ****
--- 1,134 ----
+ 2026-08-27  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	Backported from master:
+ 	2026-08-24  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	* gcc.dg/builtin-stdc-bit-1.c (main): Fix two pastos.
+ 
+ 2026-08-27  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	Backported from master:
+ 	2026-08-07  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR tree-optimization/126534
+ 	* gcc.dg/pr126534.c: New test.
+ 
+ 2026-08-27  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	Backported from master:
+ 	2026-08-07  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR target/126667
+ 	* gcc.dg/pr126667.c: New test.
+ 	* gcc.target/s390/pr126667.c: New test.
+ 
+ 2026-08-27  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	Backported from master:
+ 	2026-08-06  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR preprocessor/125048
+ 	* c-c++-common/cpp/va-opt-11.c: New test.
+ 
+ 2026-08-27  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	Backported from master:
+ 	2026-08-04  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR tree-optimization/126464
+ 	* gcc.dg/pr126464.c: Guard uses of 1e300 with
+ 	__DBL_MAX_10_EXP__ >= 301 and uses of 1e4000L with
+ 	__LDBL_MAX_10_EXP__ >= 4001.
+ 
+ 2026-08-27  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	Backported from master:
+ 	2026-08-04  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR tree-optimization/126601
+ 	* gcc.dg/tree-ssa/pr126601.c: New test.
+ 
+ 2026-08-27  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	Backported from master:
+ 	2026-08-04  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR tree-optimization/126564
+ 	* gcc.dg/torture/pr126564.c: New test.
+ 
+ 2026-08-27  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	Backported from master:
+ 	2026-08-03  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR tree-optimization/126547
+ 	* gcc.dg/torture/pr126547.c: New test.
+ 
+ 2026-08-27  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	Backported from master:
+ 	2026-08-03  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR tree-optimization/126576
+ 	* gcc.dg/torture/pr126576.c: New test.
+ 
+ 2026-08-27  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	Backported from master:
+ 	2026-08-03  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR target/126484
+ 	* g++.target/mips/pr126484.C: New test.
+ 
+ 2026-08-26  Harald Anlauf  <anlauf@gmx.de>
+ 
+ 	Backported from master:
+ 	2026-07-08  Harald Anlauf  <anlauf@gmx.de>
+ 
+ 	PR fortran/126127
+ 	* gfortran.dg/block_18.f90: New test.
+ 
+ 2026-08-26  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* gnat.dg/opt110.adb: New test.
+ 
+ 2026-08-26  Alexandre Oliva  <oliva@adacore.com>
+ 
+ 	Backported from master:
+ 	2026-08-26  Alexandre Oliva  <oliva@adacore.com>
+ 
+ 	PR tree-optimization/126650
+ 	* gcc.dg/torture/pr126650.c: Be explicit about endianness
+ 	expectations.
+ 
+ 2026-08-24  Jin Ma  <jinma@linux.alibaba.com>
+ 
+ 	Backported from master:
+ 	2026-08-21  Jin Ma  <jinma@linux.alibaba.com>
+ 
+ 	PR target/126873
+ 	* gcc.target/riscv/pr126873.c: New test.
+ 
+ 2026-08-24  Jeff Law  <jeffrey.law@oss.qualcomm.com>
+ 
+ 	Backported from master:
+ 	2026-08-14  Jeff Law  <jeffrey.law@oss.qualcomm.com>
+ 
+ 	PR rtl-optimization/126426
+ 	* gcc.target/riscv/pr126426.c: New test.
+ 
+ 2026-08-24  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* gnat.dg/array43.adb: New test.
+ 
+ 2026-08-24  Georg-Johann Lay  <avr@gjlay.de>
+ 
+ 	Backported from master:
+ 	2026-08-23  Georg-Johann Lay  <avr@gjlay.de>
+ 
+ 	PR target/127004
+ 	* gcc.target/avr/torture/pr127004.c: New test.
+ 
  2026-08-20  Hongyu Wang  <hongyu.wang@intel.com>
  
  	Backported from master:
diff -Nrcpad gcc-15-20260821/gcc/testsuite/c-c++-common/cpp/va-opt-11.c gcc-15-20260828/gcc/testsuite/c-c++-common/cpp/va-opt-11.c
*** gcc-15-20260821/gcc/testsuite/c-c++-common/cpp/va-opt-11.c	Thu Jan  1 00:00:00 1970
--- gcc-15-20260828/gcc/testsuite/c-c++-common/cpp/va-opt-11.c	Fri Aug 28 22:32:10 2026
***************
*** 0 ****
--- 1,13 ----
+ /* PR preprocessor/125048 */
+ /* { dg-do preprocess } */
+ /* { dg-options "-std=c23" { target c } } */
+ /* { dg-options "-std=c++20" { target c++ } } */
+ 
+ #define A(...)B(B(B(B(__VA_ARGS__##__VA_OPT__()))))
+ #define B(...)C(C(C(C(__VA_ARGS__##__VA_OPT__()))))
+ #define C(...)D(D(D(D(__VA_ARGS__##__VA_OPT__()))))
+ #define D(...)E(E(E(E(__VA_ARGS__##__VA_OPT__()))))
+ #define E(...)__VA_ARGS__
+ #define F
+ A(F)
+ /* { dg-final { scan-file va-opt-11.i "D\\\(D\\\(D\\\(C\\\(C\\\(C\\\(B\\\(B\\\(B\\\(\\\)\\\)\\\)\\\)\\\)\\\)\\\)\\\)\\\)" } } */
diff -Nrcpad gcc-15-20260821/gcc/testsuite/g++.target/mips/pr126484.C gcc-15-20260828/gcc/testsuite/g++.target/mips/pr126484.C
*** gcc-15-20260821/gcc/testsuite/g++.target/mips/pr126484.C	Thu Jan  1 00:00:00 1970
--- gcc-15-20260828/gcc/testsuite/g++.target/mips/pr126484.C	Fri Aug 28 22:32:12 2026
***************
*** 0 ****
--- 1,8 ----
+ // PR target/126484
+ // { dg-do compile }
+ 
+ int
+ foo ()
+ {
+   return __builtin_mips_get_fcsr ();
+ }
diff -Nrcpad gcc-15-20260821/gcc/testsuite/gcc.dg/builtin-stdc-bit-1.c gcc-15-20260828/gcc/testsuite/gcc.dg/builtin-stdc-bit-1.c
*** gcc-15-20260821/gcc/testsuite/gcc.dg/builtin-stdc-bit-1.c	Fri Aug 21 22:32:12 2026
--- gcc-15-20260828/gcc/testsuite/gcc.dg/builtin-stdc-bit-1.c	Fri Aug 28 22:32:12 2026
*************** main ()
*** 891,897 ****
        || __builtin_stdc_bit_floor (~(unsigned _BitInt(373)) 0) != ((unsigned _BitInt(373)) 1) << (373 - 1))
      __builtin_abort ();
    if (__builtin_stdc_bit_floor (((unsigned _BitInt(512)) 511) << 405) != (((unsigned _BitInt(512)) 256) << 405)
!       || __builtin_stdc_bit_floor (((unsigned _BitInt(373)) 512) << 242) != (((unsigned _BitInt(512)) 512) << 242))
      __builtin_abort ();
    if (__builtin_stdc_bit_ceil ((unsigned _BitInt(512)) 0) != 1
        || !expr_has_type (__builtin_stdc_bit_ceil ((unsigned _BitInt(512)) 0), unsigned _BitInt(512))
--- 891,897 ----
        || __builtin_stdc_bit_floor (~(unsigned _BitInt(373)) 0) != ((unsigned _BitInt(373)) 1) << (373 - 1))
      __builtin_abort ();
    if (__builtin_stdc_bit_floor (((unsigned _BitInt(512)) 511) << 405) != (((unsigned _BitInt(512)) 256) << 405)
!       || __builtin_stdc_bit_floor (((unsigned _BitInt(373)) 512) << 242) != (((unsigned _BitInt(373)) 512) << 242))
      __builtin_abort ();
    if (__builtin_stdc_bit_ceil ((unsigned _BitInt(512)) 0) != 1
        || !expr_has_type (__builtin_stdc_bit_ceil ((unsigned _BitInt(512)) 0), unsigned _BitInt(512))
*************** main ()
*** 905,911 ****
        || __builtin_stdc_bit_ceil ((~(unsigned _BitInt(373)) 0) >> 1) != ((unsigned _BitInt(373)) 1) << (373 - 1))
      __builtin_abort ();
    if (__builtin_stdc_bit_ceil (((unsigned _BitInt(512)) 512) << 405) != (((unsigned _BitInt(512)) 512) << 405)
!       || __builtin_stdc_bit_ceil (((unsigned _BitInt(373)) 513) << 242) != (((unsigned _BitInt(512)) 1024) << 242))
      __builtin_abort ();
    if (__builtin_stdc_bit_floor ((unsigned _BitInt(__BITINT_MAXWIDTH__)) 0) != 0)
      __builtin_abort ();
--- 905,911 ----
        || __builtin_stdc_bit_ceil ((~(unsigned _BitInt(373)) 0) >> 1) != ((unsigned _BitInt(373)) 1) << (373 - 1))
      __builtin_abort ();
    if (__builtin_stdc_bit_ceil (((unsigned _BitInt(512)) 512) << 405) != (((unsigned _BitInt(512)) 512) << 405)
!       || __builtin_stdc_bit_ceil (((unsigned _BitInt(373)) 513) << 242) != (((unsigned _BitInt(373)) 1024) << 242))
      __builtin_abort ();
    if (__builtin_stdc_bit_floor ((unsigned _BitInt(__BITINT_MAXWIDTH__)) 0) != 0)
      __builtin_abort ();
diff -Nrcpad gcc-15-20260821/gcc/testsuite/gcc.dg/pr126464.c gcc-15-20260828/gcc/testsuite/gcc.dg/pr126464.c
*** gcc-15-20260821/gcc/testsuite/gcc.dg/pr126464.c	Fri Aug 21 22:32:13 2026
--- gcc-15-20260828/gcc/testsuite/gcc.dg/pr126464.c	Fri Aug 28 22:32:13 2026
*************** qux (long double x)
*** 47,61 ****
--- 47,65 ----
  int
  main ()
  {
+ #if __DBL_MAX_10_EXP__ >= 301
    if (!__builtin_isinf ((double) 1e300)
        && __builtin_isinf ((float) 1e300)
        && (foo (-1e300) != -5e299
  	  || baz (1e300) != 5e299))
      __builtin_abort ();
+ #endif
  
+ #if __LDBL_MAX_10_EXP__ >= 4001
    if (!__builtin_isinf ((long double) 1e4000L)
        && __builtin_isinf ((double) 1e4000L)
        && (bar (1e4000L) != 5e3999L
  	  || qux (-1e4000L) != -5e3999L))
      __builtin_abort ();
+ #endif
  }
diff -Nrcpad gcc-15-20260821/gcc/testsuite/gcc.dg/pr126534.c gcc-15-20260828/gcc/testsuite/gcc.dg/pr126534.c
*** gcc-15-20260821/gcc/testsuite/gcc.dg/pr126534.c	Thu Jan  1 00:00:00 1970
--- gcc-15-20260828/gcc/testsuite/gcc.dg/pr126534.c	Fri Aug 28 22:32:13 2026
***************
*** 0 ****
--- 1,45 ----
+ /* PR tree-optimization/126534 */
+ /* { dg-do run } */
+ /* { dg-options "-O2" } */
+ 
+ [[gnu::noipa]] int
+ foo (double x)
+ {
+   double y = __builtin_sqrt (x);
+   if (y <= 5.0)
+     {
+       if (x > 25.0)
+ 	return 1;
+       return 2;
+     }
+   return 3;
+ }
+ 
+ [[gnu::noipa]] int
+ bar (double x)
+ {
+   double y = __builtin_sqrt (x);
+   if (y >= 5.0)
+     {
+       if (x < 25.0)
+ 	return 1;
+       return 2;
+     }
+   return 3;
+ }
+ 
+ int
+ main ()
+ {
+ #if __DBL_MANT_DIG__ == 53 && __DBL_MAX_EXP__ == 1024 && __FLT_EVAL_METHOD__ == 0
+   volatile double x = 0x1.9000000000001p+4;
+   volatile double y = 0x1.8ffffffffffffp+4;
+   if (__builtin_sqrt (x) == 5.0 && __builtin_sqrt (y) == 5.0)
+     {
+       if (foo (0x1.9000000000001p+4) != 1)    /* 25.000000000000004 */
+ 	__builtin_abort ();
+       if (bar (0x1.8ffffffffffffp+4) != 1)    /* 24.999999999999996 */
+ 	__builtin_abort ();
+     }
+ #endif
+ }
diff -Nrcpad gcc-15-20260821/gcc/testsuite/gcc.dg/pr126667.c gcc-15-20260828/gcc/testsuite/gcc.dg/pr126667.c
*** gcc-15-20260821/gcc/testsuite/gcc.dg/pr126667.c	Thu Jan  1 00:00:00 1970
--- gcc-15-20260828/gcc/testsuite/gcc.dg/pr126667.c	Fri Aug 28 22:32:13 2026
***************
*** 0 ****
--- 1,9 ----
+ /* PR target/126667 */
+ /* { dg-do compile } */
+ /* { dg-options "-O2" } */
+ 
+ unsigned long
+ foo (unsigned long x, unsigned long y, unsigned long *p)
+ {
+   return __builtin_subcl (x, y, 1UL, p);
+ }
diff -Nrcpad gcc-15-20260821/gcc/testsuite/gcc.dg/torture/pr126547.c gcc-15-20260828/gcc/testsuite/gcc.dg/torture/pr126547.c
*** gcc-15-20260821/gcc/testsuite/gcc.dg/torture/pr126547.c	Thu Jan  1 00:00:00 1970
--- gcc-15-20260828/gcc/testsuite/gcc.dg/torture/pr126547.c	Fri Aug 28 22:32:13 2026
***************
*** 0 ****
--- 1,31 ----
+ /* PR tree-optimization/126547 */
+ /* { dg-do run } */
+ 
+ #if __LDBL_HAS_INFINITY__
+ [[gnu::noipa]] static int
+ foo (long double a1, long double a2)
+ {
+   if (a1 >= 1.0 && a1 <= 8.0)
+     {
+       long double d = a1 / a2;
+       int n = 0;
+       if (d >= __builtin_infl ())
+ 	n += 1;
+       if (a2 > 0.0L)
+ 	n += 2;
+       return n;
+     }
+   else
+     return -1;
+ }
+ #endif
+ 
+ int
+ main ()
+ {
+ #if __LDBL_HAS_INFINITY__
+   if (__builtin_isinf (1.0 / __LDBL_DENORM_MIN__)
+       && foo (1.0, __LDBL_DENORM_MIN__) != 3)
+     __builtin_abort ();
+ #endif
+ }
diff -Nrcpad gcc-15-20260821/gcc/testsuite/gcc.dg/torture/pr126564.c gcc-15-20260828/gcc/testsuite/gcc.dg/torture/pr126564.c
*** gcc-15-20260821/gcc/testsuite/gcc.dg/torture/pr126564.c	Thu Jan  1 00:00:00 1970
--- gcc-15-20260828/gcc/testsuite/gcc.dg/torture/pr126564.c	Fri Aug 28 22:32:13 2026
***************
*** 0 ****
--- 1,25 ----
+ /* PR tree-optimization/126564 */
+ /* { dg-do run } */
+ 
+ __attribute__((noipa)) int
+ foo (int x, int y)
+ {
+   int c = 2;
+   if (x == y)
+     c = 0;
+   else if (x < y)
+     c = -1;
+   else if (x <= y)
+     c = 1;
+   return c == 1;
+ }
+ 
+ int
+ main ()
+ {
+   int i, j;
+   for (i = -3; i <= 3; i++)
+     for (j = -3; j <= 3; j++)
+       if (foo (i, j) != 0)
+ 	__builtin_abort ();
+ }
diff -Nrcpad gcc-15-20260821/gcc/testsuite/gcc.dg/torture/pr126576.c gcc-15-20260828/gcc/testsuite/gcc.dg/torture/pr126576.c
*** gcc-15-20260821/gcc/testsuite/gcc.dg/torture/pr126576.c	Thu Jan  1 00:00:00 1970
--- gcc-15-20260828/gcc/testsuite/gcc.dg/torture/pr126576.c	Fri Aug 28 22:32:13 2026
***************
*** 0 ****
--- 1,43 ----
+ /* PR tree-optimization/126576 */
+ /* { dg-do run } */
+ 
+ #if __DBL_MANT_DIG__ == 53 && __DBL_MAX_10_EXP__ == 308 \
+     && __DBL_HAS_INFINITY__ && __FLT_EVAL_METHOD__ == 0
+ int v;
+ 
+ [[gnu::noipa]] void
+ bar (int x)
+ {
+   v |= x;
+ }
+ 
+ [[gnu::noipa]] double
+ foo (double x)
+ {
+   double a = x * x;
+   if (__builtin_isinf (a) && !__builtin_isinf (x))
+     bar (1);
+   double b = a * 3.0;
+   if (__builtin_isinf (b) && !__builtin_isinf (a))
+     bar (2);
+   return b;
+ }
+ #endif
+ 
+ int
+ main ()
+ {
+ #if __DBL_MANT_DIG__ == 53 && __DBL_MAX_10_EXP__ == 308 \
+     && __DBL_HAS_INFINITY__ && __FLT_EVAL_METHOD__ == 0
+   foo (1e154);
+   if (v != 2)
+     __builtin_abort ();
+   v = 0;
+   foo (1e152);
+   if (v != 0)
+     __builtin_abort ();
+   foo (1e155);
+   if (v != 1)
+     __builtin_abort ();
+ #endif    
+ }
diff -Nrcpad gcc-15-20260821/gcc/testsuite/gcc.dg/torture/pr126650.c gcc-15-20260828/gcc/testsuite/gcc.dg/torture/pr126650.c
*** gcc-15-20260821/gcc/testsuite/gcc.dg/torture/pr126650.c	Fri Aug 21 22:32:13 2026
--- gcc-15-20260828/gcc/testsuite/gcc.dg/torture/pr126650.c	Fri Aug 28 22:32:13 2026
***************
*** 1,4 ****
! /* { dg-do run } */
  
  #include <stdarg.h>
  #include <stdlib.h>
--- 1,4 ----
! /* { dg-do run { target { le || be } } } */
  
  #include <stdarg.h>
  #include <stdlib.h>
*************** void __attribute__((noipa)) foo (int n,
*** 17,30 ****
  
  int main()
  {
!   struct b {
      int : 7;
      int : 2;
      int : 6;
      int : 3;
      int c : 7;
    };
!   union {
      int d;
      struct b bf;
      char e[4];
--- 17,30 ----
  
  int main()
  {
!   struct __attribute__ ((scalar_storage_order ("little-endian"))) b {
      int : 7;
      int : 2;
      int : 6;
      int : 3;
      int c : 7;
    };
!   union __attribute__ ((scalar_storage_order ("little-endian"))) {
      int d;
      struct b bf;
      char e[4];
diff -Nrcpad gcc-15-20260821/gcc/testsuite/gcc.dg/tree-ssa/pr126601.c gcc-15-20260828/gcc/testsuite/gcc.dg/tree-ssa/pr126601.c
*** gcc-15-20260821/gcc/testsuite/gcc.dg/tree-ssa/pr126601.c	Thu Jan  1 00:00:00 1970
--- gcc-15-20260828/gcc/testsuite/gcc.dg/tree-ssa/pr126601.c	Fri Aug 28 22:32:13 2026
***************
*** 0 ****
--- 1,29 ----
+ /* PR tree-optimization/126601 */
+ /* { dg-do compile } */
+ /* { dg-options "-Os" } */
+ 
+ volatile int c[16];
+ 
+ [[gnu::noipa]] int
+ foo (unsigned x, unsigned y)
+ {
+   unsigned r = x * y;
+   int t = 0;
+   if (c[0]) { int u = 0; if (x != 0) u = (r / x != y); t += u; }
+   if (c[1]) { int u = 0; if (x != 0) u = (r / x != y); t += u; }
+   if (c[2]) { int u = 0; if (x != 0) u = (r / x != y); t += u; }
+   if (c[3]) { int u = 0; if (x != 0) u = (r / x != y); t += u; }
+   if (c[4]) { int u = 0; if (x != 0) u = (r / x != y); t += u; }
+   if (c[5]) { int u = 0; if (x != 0) u = (r / x != y); t += u; }
+   if (c[6]) { int u = 0; if (x != 0) u = (r / x != y); t += u; }
+   if (c[7]) { int u = 0; if (x != 0) u = (r / x != y); t += u; }
+   if (c[8]) { int u = 0; if (x != 0) u = (r / x != y); t += u; }
+   if (c[9]) { int u = 0; if (x != 0) u = (r / x != y); t += u; }
+   if (c[10]) { int u = 0; if (x != 0) u = (r / x != y); t += u; }
+   if (c[11]) { int u = 0; if (x != 0) u = (r / x != y); t += u; }
+   if (c[12]) { int u = 0; if (x != 0) u = (r / x != y); t += u; }
+   if (c[13]) { int u = 0; if (x != 0) u = (r / x != y); t += u; }
+   if (c[14]) { int u = 0; if (x != 0) u = (r / x != y); t += u; }
+   if (c[15]) { int u = 0; if (x != 0) u = (r / x != y); t += u; }
+   return t;
+ }
diff -Nrcpad gcc-15-20260821/gcc/testsuite/gcc.target/avr/torture/pr127004.c gcc-15-20260828/gcc/testsuite/gcc.target/avr/torture/pr127004.c
*** gcc-15-20260821/gcc/testsuite/gcc.target/avr/torture/pr127004.c	Thu Jan  1 00:00:00 1970
--- gcc-15-20260828/gcc/testsuite/gcc.target/avr/torture/pr127004.c	Fri Aug 28 22:32:14 2026
***************
*** 0 ****
--- 1,7 ----
+ /* { dg-do compile } */
+ /* { dg-additional-options "-std=c99" } */
+ 
+ unsigned f (unsigned x)
+ {
+   return (unsigned) (((unsigned long long) x * 0xAAAAAAAB) >> 32) >> 1;
+ }
diff -Nrcpad gcc-15-20260821/gcc/testsuite/gcc.target/powerpc/builtins-1.c gcc-15-20260828/gcc/testsuite/gcc.target/powerpc/builtins-1.c
*** gcc-15-20260821/gcc/testsuite/gcc.target/powerpc/builtins-1.c	Fri Aug 21 22:32:15 2026
--- gcc-15-20260828/gcc/testsuite/gcc.target/powerpc/builtins-1.c	Fri Aug 28 22:32:15 2026
*************** foo156 (vector unsigned short usa)
*** 1035,1038 ****
  /* { dg-final { scan-assembler-times {\mvmrglb\M} 3 } } */
  /* { dg-final { scan-assembler-times {\mvmrgew\M} 4 } } */
  /* { dg-final { scan-assembler-times {\mvsplth|xxsplth\M} 4 } } */
! /* { dg-final { scan-assembler-times {\mxxpermdi\M} 44 } } */
--- 1035,1038 ----
  /* { dg-final { scan-assembler-times {\mvmrglb\M} 3 } } */
  /* { dg-final { scan-assembler-times {\mvmrgew\M} 4 } } */
  /* { dg-final { scan-assembler-times {\mvsplth|xxsplth\M} 4 } } */
! /* { dg-final { scan-assembler-times {\mxxpermdi\M} 42 } } */
diff -Nrcpad gcc-15-20260821/gcc/testsuite/gcc.target/powerpc/pr117487.c gcc-15-20260828/gcc/testsuite/gcc.target/powerpc/pr117487.c
*** gcc-15-20260821/gcc/testsuite/gcc.target/powerpc/pr117487.c	Thu Jan  1 00:00:00 1970
--- gcc-15-20260828/gcc/testsuite/gcc.target/powerpc/pr117487.c	Fri Aug 28 22:32:15 2026
***************
*** 0 ****
--- 1,67 ----
+ /* { dg-do compile { target lp64 } } */
+ /* { dg-options "-mdejagnu-cpu=power9 -O2" } */
+ /* { dg-require-effective-target powerpc_vsx } */
+ 
+ #include <stdint.h>
+ 
+ /*
+  * PR target/117487
+  *
+  * On power8 with the optimization it generates:
+  *
+  *	xscvdpspn 0,1
+  *	sldi 9,4,32
+  *	mtvsrd 32,9
+  *	xxland 1,0,32
+  *	xscvspdpn 1,1
+  *
+  * I.e., it converts the SFmode to the memory format (instead of the DFmode
+  * that is used within the register), converts the mask so that it is in the
+  * vector register in the upper 32-bits, and does a XXLAND (i.e. there is only
+  * one direct move from GPR to vector register).  Then after doing this, it
+  * converts the upper 32-bits back to DFmode.
+  *
+  * If the XSCVSPDN instruction took the value in the normal 32-bit scalar in a
+  * vector register, we wouldn't have needed the SLDI of the mask.
+  *
+  * On power9/power10/power11 before the fix wa applied, GCC generated:
+  *
+  *	xscvdpspn 0,1
+  *	mfvsrwz 2,0
+  *	and 2,2,4
+  *	mtvsrws 1,2
+  *	xscvspdpn 1,1
+  *	blr
+  *
+  * I.e convert to SFmode representation, move the value to a GPR, do an AND
+  * operation, move the 32-bit value with a splat, and then convert it back to
+  * DFmode format.
+  *
+  * After the patch was applied, it now generates:
+  *
+  *	xscvdpspn 0,1
+  *	mtvsrwz 32,2
+  *	xxland 32,0,32
+  *	xxspltw 1,32,1
+  *	xscvspdpn 1,1
+  *	blr
+  */
+ 
+ union u {
+   float f;
+   uint32_t u32;
+ };
+ 
+ float
+ math_foo (float x, unsigned int mask)
+ {
+   union u arg;
+ 
+   arg.f = x;
+   arg.u32 &= mask;
+   return arg.f;
+ }
+ 
+ /* { dg-final { scan-assembler     {\mxxland\M} } } */
+ /* { dg-final { scan-assembler-not {\mmfvsr}    } } */
+ /* { dg-final { scan-assembler-not {\mand\M}    } } */
diff -Nrcpad gcc-15-20260821/gcc/testsuite/gcc.target/powerpc/pr120528.c gcc-15-20260828/gcc/testsuite/gcc.target/powerpc/pr120528.c
*** gcc-15-20260821/gcc/testsuite/gcc.target/powerpc/pr120528.c	Thu Jan  1 00:00:00 1970
--- gcc-15-20260828/gcc/testsuite/gcc.target/powerpc/pr120528.c	Fri Aug 28 22:32:15 2026
***************
*** 0 ****
--- 1,91 ----
+ /* { dg-do compile } */
+ /* { dg-require-effective-target int128 } */
+ /* { dg-require-effective-target lp64 } */
+ /* { dg-require-effective-target power10_ok } */
+ /* { dg-options "-mdejagnu-cpu=power10 -O2" } */
+ 
+ #include <stddef.h>
+ 
+ #ifndef TYPE
+ #define TYPE unsigned long long
+ #endif
+ 
+ void
+ mem_to_vsx (TYPE *p, __uint128_t *q)
+ {
+   /* lxvrdx 0,0,3
+      stxv 0,0(4)  */
+ 
+   __uint128_t x = *p;
+   __asm__ (" # %x0" : "+wa" (x));
+   *q = x;
+ }
+ 
+ void
+ memx_to_vsx (TYPE *p, size_t n, __uint128_t *q)
+ {
+   /* sldi 4,4,3
+      lxvrdx 0,3,4
+      stxv 0,0(4)  */
+ 
+   __uint128_t x = p[n];
+   __asm__ (" # %x0" : "+wa" (x));
+   *q = x;
+ }
+ 
+ void
+ mem3_to_vsx (TYPE *p, __uint128_t *q)
+ {
+   /* addi 2,3,24
+      lxvrdx 0,0,2
+      stxv 0,0(4)  */
+ 
+   __uint128_t x = p[3];
+   __asm__ (" # %x0" : "+wa" (x));
+   *q = x;
+ }
+ 
+ void
+ mem_to_gpr (TYPE *p, __uint128_t *q)
+ {
+   /* ld 2,0(3)
+      li 3,0
+      std 2,0(4)
+      std 3,8(8)  */
+ 
+   __uint128_t x = *p;
+   __asm__ (" # %0" : "+r" (x));
+   *q = x;
+ }
+ 
+ void
+ memx_to_gpr (TYPE *p, size_t n, __uint128_t *q)
+ {
+   /* sldi 4,4,3
+      ldx 2,3,4
+      li 3,0
+      std 2,0(4)
+      std 3,8(8)  */
+ 
+   __uint128_t x = p[n];
+   __asm__ (" # %0" : "+r" (x));
+   *q = x;
+ }
+ 
+ void
+ mem3_to_gpr (TYPE *p, __uint128_t *q)
+ {
+   /* ld 2,24(3)
+      li 3,0
+      std 2,0(4)
+      std 3,8(8)  */
+ 
+   __uint128_t x = p[3];
+   __asm__ (" # %0" : "+r" (x));
+   *q = x;
+ }
+ 
+ /* { dg-final { scan-assembler-times {\maddi\M}   1 } } */
+ /* { dg-final { scan-assembler-times {\mli\M}     3 } } */
+ /* { dg-final { scan-assembler-times {\mlxvrdx\M} 3 } } */
+ /* { dg-final { scan-assembler-times {\mstxv\M}   3 } } */
diff -Nrcpad gcc-15-20260821/gcc/testsuite/gcc.target/powerpc/pr120681.c gcc-15-20260828/gcc/testsuite/gcc.target/powerpc/pr120681.c
*** gcc-15-20260821/gcc/testsuite/gcc.target/powerpc/pr120681.c	Thu Jan  1 00:00:00 1970
--- gcc-15-20260828/gcc/testsuite/gcc.target/powerpc/pr120681.c	Fri Aug 28 22:32:15 2026
***************
*** 0 ****
--- 1,34 ----
+ /* { dg-do compile } */
+ /* { dg-require-effective-target powerpc_elfv2 } */
+ /* { dg-require-effective-target powerpc_pcrel } */
+ /* { dg-options "-mdejagnu-cpu=power10 -O2 -mcmodel=large" } */
+ 
+ /* PR target/120681 -- verify that -mcpu=power10 -mcmodel=large uses PC
+    relative addressing instead of using TOC addressing.  */
+ 
+ #ifndef TYPE
+ #define TYPE unsigned long
+ #endif
+ 
+ extern TYPE global_var;
+ 
+ void
+ set_global (TYPE value)
+ {
+   /*
+    * Generate:
+    * pld 9,global_var@got@pcrel
+    * std 3,0(9)
+    *
+    * Not:
+    * addis 9,2,.LC0@toc@ha
+    * ld    9,.LC0@toc@l(9)
+    * std   3,0(9)
+    */
+ 
+   global_var = value;
+ }
+ 
+ /* { dg-final { scan-assembler     {@got@pcrel} } } */
+ /* { dg-final { scan-assembler-not {@toc@ha}    } } */
+ /* { dg-final { scan-assembler-not {@toc@l}     } } */
diff -Nrcpad gcc-15-20260821/gcc/testsuite/gcc.target/powerpc/pr99293.c gcc-15-20260828/gcc/testsuite/gcc.target/powerpc/pr99293.c
*** gcc-15-20260821/gcc/testsuite/gcc.target/powerpc/pr99293.c	Thu Jan  1 00:00:00 1970
--- gcc-15-20260828/gcc/testsuite/gcc.target/powerpc/pr99293.c	Fri Aug 28 22:32:15 2026
***************
*** 0 ****
--- 1,22 ----
+ /* { dg-do compile { target powerpc*-*-* } } */
+ /* { dg-require-effective-target powerpc_vsx_ok } */
+ /* { dg-options "-O2 -mvsx" } */
+ 
+ /* Test for PR 99263, which wants to do:
+ 	__builtin_vec_splats (__builtin_vec_extract (v, n))
+ 
+    where v is a V2DF or V2DI vector and n is either 0 or 1.  Previously the
+    compiler would do a direct move to the GPR registers to select the item and a
+    direct move from the GPR registers to do the splat.  */
+ 
+ vector long long splat_dup_l_0 (vector long long v)
+ {
+   return __builtin_vec_splats (__builtin_vec_extract (v, 0));
+ }
+ 
+ vector long long splat_dup_l_1 (vector long long v)
+ {
+   return __builtin_vec_splats (__builtin_vec_extract (v, 1));
+ }
+ 
+ /* { dg-final { scan-assembler-times "xxpermdi" 2 } } */
diff -Nrcpad gcc-15-20260821/gcc/testsuite/gcc.target/riscv/pr126426.c gcc-15-20260828/gcc/testsuite/gcc.target/riscv/pr126426.c
*** gcc-15-20260821/gcc/testsuite/gcc.target/riscv/pr126426.c	Thu Jan  1 00:00:00 1970
--- gcc-15-20260828/gcc/testsuite/gcc.target/riscv/pr126426.c	Fri Aug 28 22:32:15 2026
***************
*** 0 ****
--- 1,43 ----
+ /* { dg-do run } */
+ /* { dg-additional-options "--std=gnu99 -march=rv64gcb" { target rv64 } } */
+ /* { dg-additional-options "--std=gnu99 -march=rv32gcb" { target rv32 } } */
+ 
+ typedef union {
+   short mv[2];
+   unsigned mv32;
+ } MotionVector;
+ enum { kProjectionMvClamp, kMaxFrameDistance };
+ short kProjectionMvDivisionLookup[] = {0, 6};
+ int SpecGetMvProjectionKernel(int mv, int numerator, int denominator) {
+   int value = mv * numerator * kProjectionMvDivisionLookup[denominator];
+   if (value >= 0)
+     value += 3;
+   value >>= 4;
+   if (value > 4)
+     value = 1;
+   return value;
+ }
+ void SpecGetMvProjectionNoClamp(MotionVector mv, int numerator, int denominator,
+                                 MotionVector *projection_mv) {
+   for (int i = 0; i < 2; ++i)
+     projection_mv->mv[i] =
+         SpecGetMvProjectionKernel(mv.mv[i], numerator, denominator);
+ }
+ int main() {
+   short mvs[5][2] = {{0}};
+   for (int j = 0; j < 5; ++j) {
+     short *mv_value = mvs[j];
+     for (int numerator = -kMaxFrameDistance; numerator; ++numerator)
+       for (int denominator = 0; denominator <= kMaxFrameDistance;
+            ++denominator) {
+         MotionVector mv, spec_projection_mv;
+         mv.mv[0] = mv.mv[1] = mv_value[1];
+         SpecGetMvProjectionNoClamp(mv, numerator, denominator,
+                                    &spec_projection_mv);
+         if (spec_projection_mv.mv32) {
+            __builtin_abort ();
+ 	}
+       }
+   }
+   __builtin_exit (0);
+ }
diff -Nrcpad gcc-15-20260821/gcc/testsuite/gcc.target/riscv/pr126873.c gcc-15-20260828/gcc/testsuite/gcc.target/riscv/pr126873.c
*** gcc-15-20260821/gcc/testsuite/gcc.target/riscv/pr126873.c	Thu Jan  1 00:00:00 1970
--- gcc-15-20260828/gcc/testsuite/gcc.target/riscv/pr126873.c	Fri Aug 28 22:32:15 2026
***************
*** 0 ****
--- 1,37 ----
+ /* { dg-do run { target rv64 } } */
+ /* { dg-require-effective-target riscv_v } */
+ /* { dg-require-effective-target rvv_zvl128b_ok } */
+ /* { dg-options "-march=rv64gcv -mabi=lp64d -O1" } */
+ 
+ typedef unsigned short u16 __attribute__ ((vector_size (4)));
+ 
+ unsigned long long g;
+ 
+ void __attribute__ ((noinline))
+ f1 (unsigned long long a3)
+ {
+   unsigned long long v15
+     = __builtin_bswap64 ((long long) 10398105857157080808ull
+ 			 / (long long) a3);
+   u16 bc13 = (u16) { 29637 };
+   if (0 >= bc13[(unsigned int) v15])
+     __builtin_abort ();
+ }
+ 
+ u16 __attribute__ ((noinline))
+ f2 (u16 in)
+ {
+   in[(unsigned int) g] = 123;
+   return in;
+ }
+ 
+ int
+ main (void)
+ {
+   f1 (17752357569705450221ull);
+   g = 0x0b00000000000000ull;
+   u16 r = f2 ((u16) { 1, 2 });
+   if (r[0] != 123 || r[1] != 2)
+     __builtin_abort ();
+   return 0;
+ }
diff -Nrcpad gcc-15-20260821/gcc/testsuite/gcc.target/s390/pr126667.c gcc-15-20260828/gcc/testsuite/gcc.target/s390/pr126667.c
*** gcc-15-20260821/gcc/testsuite/gcc.target/s390/pr126667.c	Thu Jan  1 00:00:00 1970
--- gcc-15-20260828/gcc/testsuite/gcc.target/s390/pr126667.c	Fri Aug 28 22:32:15 2026
***************
*** 0 ****
--- 1,9 ----
+ /* PR target/126667 */
+ /* { dg-do compile } */
+ /* { dg-options "-O2 -march=z14" } */
+ 
+ unsigned long
+ foo (unsigned long x, unsigned long y, unsigned long *p)
+ {
+   return __builtin_subcl (x, y, 1UL, p);
+ }
diff -Nrcpad gcc-15-20260821/gcc/testsuite/gfortran.dg/block_18.f90 gcc-15-20260828/gcc/testsuite/gfortran.dg/block_18.f90
*** gcc-15-20260821/gcc/testsuite/gfortran.dg/block_18.f90	Thu Jan  1 00:00:00 1970
--- gcc-15-20260828/gcc/testsuite/gfortran.dg/block_18.f90	Fri Aug 28 22:32:16 2026
***************
*** 0 ****
--- 1,66 ----
+ ! { dg-do compile }
+ !
+ ! PR fortran/126127 - resolution of user-defined operators in named BLOCK
+ 
+ module geom2d
+   use, intrinsic :: iso_fortran_env, only: wp => real64
+   implicit none
+   private
+   public :: vec2_t, operator(.dot.)
+ 
+   type :: vec2_t
+      real(wp) :: x = 0, y = 0
+   end type vec2_t
+ 
+   interface operator(.dot.)
+      module procedure vec_dot
+   end interface operator(.dot.)
+ contains
+   pure function vec_dot(a, b) result(r)
+     type(vec2_t), intent(in) :: a, b
+     real(wp)                 :: r
+     r = a%x*b%x + a%y*b%y
+   end function vec_dot
+ end module
+ 
+ module consumer
+   use, intrinsic :: iso_fortran_env, only: r8 => real64
+   use geom2d, only: vec2_t, operator(.dot.)
+   implicit none
+ contains
+   subroutine f(id)
+     integer, intent(out) :: id
+     type(vec2_t) :: d
+     real(r8)     :: dd
+     id = 0
+     blk: block
+       dd = d .dot. d
+     end block blk
+   end subroutine f
+ 
+   subroutine f2(id)
+     integer, intent(out) :: id
+     type(vec2_t) :: d
+     real(r8)     :: dd
+     id = 0
+     block
+       dd = d .dot. d
+     end block
+   end subroutine f2
+ 
+   subroutine f3(id)
+     integer, intent(out) :: id
+     type(vec2_t) :: d
+     real(r8)     :: dd
+     block
+       blk1: block
+         id = 0
+         block
+           blk2: block
+             dd = d .dot. d
+           end block blk2
+         end block
+       end block blk1
+     end block
+   end subroutine f3
+ end module
diff -Nrcpad gcc-15-20260821/gcc/testsuite/gnat.dg/array43.adb gcc-15-20260828/gcc/testsuite/gnat.dg/array43.adb
*** gcc-15-20260821/gcc/testsuite/gnat.dg/array43.adb	Thu Jan  1 00:00:00 1970
--- gcc-15-20260828/gcc/testsuite/gnat.dg/array43.adb	Fri Aug 28 22:32:16 2026
***************
*** 0 ****
--- 1,19 ----
+ -- { dg-do run }
+ 
+ procedure Array43 is
+ 
+   type Arr is array (Integer range <>) of Integer;
+ 
+   procedure Fill (B : out Arr; N : Integer) is
+   begin
+     B := (1 .. N => 7);
+   end Fill;
+ 
+   V : Arr (5 .. 8) := (others => 0);
+ 
+ begin
+   Fill (V, V'Length);
+   if V /= (V'First .. V'Last => 7) then
+     raise Program_Error;
+   end if;
+ end;
diff -Nrcpad gcc-15-20260821/gcc/testsuite/gnat.dg/opt110.adb gcc-15-20260828/gcc/testsuite/gnat.dg/opt110.adb
*** gcc-15-20260821/gcc/testsuite/gnat.dg/opt110.adb	Thu Jan  1 00:00:00 1970
--- gcc-15-20260828/gcc/testsuite/gnat.dg/opt110.adb	Fri Aug 28 22:32:16 2026
***************
*** 0 ****
--- 1,106 ----
+ -- { dg-do run }
+ -- { dg-options "-O" }
+ 
+ procedure Opt110 is
+ 
+   type REAL is new Long_Float;
+ 
+   R : REAL;
+ 
+   N : constant := 3;
+ 
+   C2, S2 : array ( 0..N) of REAL;
+   C, S   : array (-N..0) of REAL;
+ 
+   U, V : REAL;
+ 
+   procedure ADD (C1, S1, C2L, S2L :     REAL;
+                  CO, SO           : out REAL) is
+   begin
+     CO := C1*C2L - S1*S2L;
+     SO := S1*C2L + C1*S2L;
+   end ADD;
+ 
+   procedure TERM (I1, I    : Integer;
+                   DLC, DLS : REAL) is
+   begin
+     ADD (C2(I1), S2(I1), C(I), S(I), U, V);
+     R := R + DLC*U + DLS*V;
+   end TERM;
+ 
+   procedure PERT_1 is
+     COS_M : constant REAL := -0.810937203096633;
+     SIN_M : constant REAL := 0.585133192216790;
+   begin
+     C(-1) := COS_M;
+     S(-1) := -SIN_M;
+     ADD (C(-1), S(-1), C(-1), S(-1), C(-2), S(-2));
+     TERM (1, -1, 0.00,  0.00);
+     TERM (2, -1, 0.25, -0.09);
+   end PERT_1;
+ 
+   procedure PERT_2 is
+     COS_M : constant REAL := -0.977631621135276;
+     SIN_M : constant REAL := 0.210324542924530;
+   begin
+     C(-1) := COS_M;
+     S(-1) := -SIN_M;
+     for I in reverse -(N-1) .. -1 loop
+       ADD (C(I), S(I), C(-1), S(-1), C(I-1), S(I-1));
+     end loop;
+     TERM (1, 0, 2.37, 2793.23);
+   end PERT_2;
+ 
+   procedure PERT_3 is
+     COS_M : constant REAL := 0.682917440967473;
+     SIN_M : constant REAL := 0.730495563862258;
+   begin
+     C(-1) := COS_M;
+     S(-1) := -SIN_M;
+     for I in reverse -2 .. -1 loop
+       ADD (C(I), S(I), C(-1), S(-1), C(I-1), S(I-1));
+     end loop;
+     TERM (1, -3, -0.65, 1.02);
+     TERM (2, -2, -0.05, 0.04);
+     TERM (2, -3, -0.50, 0.45);
+   end PERT_3;
+ 
+   procedure PERT_4 is
+     COS_M : constant REAL := -0.238503621267387;
+     SIN_M : constant REAL := 0.971141607924582;
+   begin
+     C(-1) := COS_M;
+     S(-1) := -SIN_M;
+     for I in reverse -2 .. -1 loop
+       ADD (C(I), S(I), C(-1), S(-1), C(I-1), S(I-1));
+     end loop;
+     TERM (0, -1, -0.05,  1.56);
+     TERM (1, -1, -2.62,  1.40);
+     TERM (1, -2, -0.47, -0.08);
+     TERM (2, -2, -0.73, -0.51);
+     TERM (2, -3, -0.14, -0.10);
+     TERM (3, -3, -0.01,  0.04);
+   end PERT_4;
+ 
+   COS_M : constant REAL := 0.476541619435702;
+   SIN_M : constant REAL := 0.879151912325508;
+ 
+ begin
+   R := 0.0;
+   C(0) := 1.0;
+   S(0) := 0.0;
+   C2(0) := 1.0;
+   S2(0) := 0.0;
+   C2(1) := COS_M;
+   S2(1) := SIN_M;
+   for I in 2 .. N loop
+     ADD (C2(I-1), S2(I-1), C2(1), S2(1), C2(I), S2(I));
+   end loop;
+   PERT_1;
+   PERT_2;
+   PERT_3;
+   PERT_4;
+   if Integer(R) /= 2452 then
+     raise Program_Error;
+   end if;
+ end;
diff -Nrcpad gcc-15-20260821/gcc/tree-dfa.cc gcc-15-20260828/gcc/tree-dfa.cc
*** gcc-15-20260821/gcc/tree-dfa.cc	Fri Aug 21 22:32:17 2026
--- gcc-15-20260828/gcc/tree-dfa.cc	Fri Aug 28 22:32:17 2026
*************** get_ref_base_and_extent (tree exp, poly_
*** 530,559 ****
  		   index.  */
  		seen_variable_array_ref = true;
  
! 		int_range_max vr;
! 		range_query *query;
! 		query = get_range_query (cfun);
  
  		if (TREE_CODE (index) == SSA_NAME
  		    && (low_bound = array_ref_low_bound (exp),
! 			poly_int_tree_p (low_bound))
  		    && (unit_size = array_ref_element_size (exp),
  			TREE_CODE (unit_size) == INTEGER_CST)
  		    && query->range_of_expr (vr, index)
  		    && !vr.varying_p ()
  		    && !vr.undefined_p ())
  		  {
  		    wide_int min = vr.lower_bound ();
  		    wide_int max = vr.upper_bound ();
- 		    poly_offset_int lbound = wi::to_poly_offset (low_bound);
  		    /* Try to constrain maxsize with range information.  */
  		    offset_int omax
  		      = offset_int::from (max, TYPE_SIGN (TREE_TYPE (index)));
  		    if (wi::get_precision (max) <= ADDR_MAX_BITSIZE
! 			&& known_lt (lbound, omax))
  		      {
! 			poly_offset_int rmaxsize;
! 			rmaxsize = (omax - lbound + 1)
  			    * wi::to_offset (unit_size) << LOG2_BITS_PER_UNIT;
  			if (!known_size_p (maxsize)
  			    || known_lt (rmaxsize, maxsize))
--- 530,570 ----
  		   index.  */
  		seen_variable_array_ref = true;
  
! 		/* Try to constrain the access range by using the range of the
! 		   index expression when we know it.  Extra care must be taken
! 		   when the low bound of the array is not zero, because it may
! 		   be very large and the index expression may be unsigned and
! 		   wrap around; in this case, the correct range is that of the
! 		   difference between the index expression and the low bound,
! 		   see get_inner_reference for the model computation.  */
! 		range_query *query = get_range_query (cfun);
! 		range_op_handler minus_op (MINUS_EXPR);
! 		int_range_max vr_idx, vr_lb, vr;
  
  		if (TREE_CODE (index) == SSA_NAME
  		    && (low_bound = array_ref_low_bound (exp),
! 			TREE_CODE (low_bound) == INTEGER_CST)
  		    && (unit_size = array_ref_element_size (exp),
  			TREE_CODE (unit_size) == INTEGER_CST)
  		    && query->range_of_expr (vr, index)
+ 		    && (integer_zerop (low_bound)
+ 			|| ((vr_idx = vr,
+ 			     query->range_of_expr (vr_lb, low_bound))
+ 			    && minus_op.fold_range (vr, TREE_TYPE (index),
+ 						    vr_idx, vr_lb)))
  		    && !vr.varying_p ()
  		    && !vr.undefined_p ())
  		  {
  		    wide_int min = vr.lower_bound ();
  		    wide_int max = vr.upper_bound ();
  		    /* Try to constrain maxsize with range information.  */
  		    offset_int omax
  		      = offset_int::from (max, TYPE_SIGN (TREE_TYPE (index)));
  		    if (wi::get_precision (max) <= ADDR_MAX_BITSIZE
! 			&& omax >= 0)
  		      {
! 			offset_int rmaxsize
! 			  = (omax + 1)
  			    * wi::to_offset (unit_size) << LOG2_BITS_PER_UNIT;
  			if (!known_size_p (maxsize)
  			    || known_lt (rmaxsize, maxsize))
*************** get_ref_base_and_extent (tree exp, poly_
*** 569,579 ****
  		    offset_int omin
  		      = offset_int::from (min, TYPE_SIGN (TREE_TYPE (index)));
  		    if (wi::get_precision (min) <= ADDR_MAX_BITSIZE
! 			&& known_le (lbound, omin))
  		      {
! 			poly_offset_int woffset
! 			  = wi::sext (omin - lbound,
! 				      TYPE_PRECISION (sizetype));
  			woffset *= wi::to_offset (unit_size);
  			woffset <<= LOG2_BITS_PER_UNIT;
  			bit_offset += woffset;
--- 580,589 ----
  		    offset_int omin
  		      = offset_int::from (min, TYPE_SIGN (TREE_TYPE (index)));
  		    if (wi::get_precision (min) <= ADDR_MAX_BITSIZE
! 			&& omin > 0)
  		      {
! 			offset_int woffset
! 			  = wi::sext (omin, TYPE_PRECISION (sizetype));
  			woffset *= wi::to_offset (unit_size);
  			woffset <<= LOG2_BITS_PER_UNIT;
  			bit_offset += woffset;
diff -Nrcpad gcc-15-20260821/gcc/tree-ssa-math-opts.cc gcc-15-20260828/gcc/tree-ssa-math-opts.cc
*** gcc-15-20260821/gcc/tree-ssa-math-opts.cc	Fri Aug 21 22:32:17 2026
--- gcc-15-20260828/gcc/tree-ssa-math-opts.cc	Fri Aug 28 22:32:17 2026
*************** maybe_optimize_guarding_check (vec<gimpl
*** 3711,3717 ****
  	return;
      }
    gimple_stmt_iterator gsi = gsi_after_labels (bb);
!   mul_stmts.quick_push (div_stmt);
    if (is_gimple_debug (gsi_stmt (gsi)))
      gsi_next_nondebug (&gsi);
    unsigned cast_count = 0;
--- 3711,3717 ----
  	return;
      }
    gimple_stmt_iterator gsi = gsi_after_labels (bb);
!   mul_stmts.safe_push (div_stmt);
    if (is_gimple_debug (gsi_stmt (gsi)))
      gsi_next_nondebug (&gsi);
    unsigned cast_count = 0;
diff -Nrcpad gcc-15-20260821/gcc/tree-ssa-phiopt.cc gcc-15-20260828/gcc/tree-ssa-phiopt.cc
*** gcc-15-20260821/gcc/tree-ssa-phiopt.cc	Fri Aug 21 22:32:17 2026
--- gcc-15-20260828/gcc/tree-ssa-phiopt.cc	Fri Aug 28 22:32:17 2026
*************** spaceship_replacement (basic_block cond_
*** 2744,2758 ****
  	 must be different for non-swapped operands and same for swapped
  	 operands.  */
        if ((lhs2 == lhs1)
! 	  ^ (HONOR_NANS (TREE_TYPE (lhs1))
! 	     ? ((cmp2 == LT_EXPR || cmp2 == LE_EXPR)
! 		!= (cmp1 == LT_EXPR || cmp1 == LE_EXPR))
! 	     : (((cond2_phi_edge->flags
! 		  & ((cmp2 == LT_EXPR || cmp2 == LE_EXPR)
! 		     ? EDGE_TRUE_VALUE : EDGE_FALSE_VALUE)) != 0)
! 		!= ((e1->flags
! 		     & ((cmp1 == LT_EXPR || cmp1 == LE_EXPR)
! 			 ? EDGE_TRUE_VALUE : EDGE_FALSE_VALUE)) != 0))))
  	return false;
        if (!single_pred_p (cond2_bb) || !cond_only_block_p (cond2_bb))
  	return false;
--- 2744,2752 ----
  	 must be different for non-swapped operands and same for swapped
  	 operands.  */
        if ((lhs2 == lhs1)
! 	  ^ ((cmp2 == LT_EXPR || cmp2 == LE_EXPR)
! 	     != (cmp1 == LT_EXPR || cmp1 == LE_EXPR))
! 	  ^ ((cond2_phi_edge->flags & EDGE_FALSE_VALUE) != 0))
  	return false;
        if (!single_pred_p (cond2_bb) || !cond_only_block_p (cond2_bb))
  	return false;
diff -Nrcpad gcc-15-20260821/libcpp/ChangeLog gcc-15-20260828/libcpp/ChangeLog
*** gcc-15-20260821/libcpp/ChangeLog	Fri Aug 21 22:32:17 2026
--- gcc-15-20260828/libcpp/ChangeLog	Fri Aug 28 22:32:17 2026
***************
*** 1,3 ****
--- 1,14 ----
+ 2026-08-27  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	Backported from master:
+ 	2026-08-06  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR preprocessor/125048
+ 	* macro.cc (replace_args): Remember the position of map
+ 	in the pfile->line_table->info_macro.maps array and if vostate
+ 	is DROP, recompute map pointer as expand_arg call could have
+ 	reallocated the pfile->line_table->info_macro.maps array.
+ 
  2026-06-12  Release Manager
  
  	* GCC 15.3.0 released.
diff -Nrcpad gcc-15-20260821/libcpp/macro.cc gcc-15-20260828/libcpp/macro.cc
*** gcc-15-20260821/libcpp/macro.cc	Fri Aug 21 22:32:17 2026
--- gcc-15-20260828/libcpp/macro.cc	Fri Aug 28 22:32:17 2026
*************** replace_args (cpp_reader *pfile, cpp_has
*** 1989,1994 ****
--- 1989,1995 ----
    location_t *virt_locs = NULL;
    unsigned int exp_count;
    const line_map_macro *map = NULL;
+   size_t map_idx = 0;
    int track_macro_exp;
  
    /* First, fully macro-expand arguments, calculating the number of
*************** replace_args (cpp_reader *pfile, cpp_has
*** 2099,2104 ****
--- 2100,2106 ----
        map = linemap_enter_macro (pfile->line_table, node,
  				 expansion_point_loc,
  				 num_macro_tokens);
+       map_idx = map - pfile->line_table->info_macro.maps;
      }
    i = 0;
    vaopt_state vaopt_tracker (pfile, macro->variadic, &args[macro->paramc - 1]);
*************** replace_args (cpp_reader *pfile, cpp_has
*** 2220,2225 ****
--- 2222,2232 ----
  					 NULL, 0);
  		}
  	    }
+ 	  else if (vostate == vaopt_state::DROP && map)
+ 	    /* For the DROP case vaopt_tracker.update (src) can call
+ 	       expand_arg and that can reallocate the maps, so need to
+ 	       update the map pointer.  */
+ 	    map = pfile->line_table->info_macro.maps + map_idx;
  	  continue;
  	}
  
diff -Nrcpad gcc-15-20260821/libgcc/config/avr/libf7/ChangeLog gcc-15-20260828/libgcc/config/avr/libf7/ChangeLog
*** gcc-15-20260821/libgcc/config/avr/libf7/ChangeLog	Fri Aug 21 22:32:17 2026
--- gcc-15-20260828/libgcc/config/avr/libf7/ChangeLog	Fri Aug 28 22:32:17 2026
***************
*** 1,3 ****
--- 1,12 ----
+ 2026-08-24  Georg-Johann Lay  <avr@gjlay.de>
+ 
+ 	Backported from master:
+ 	2026-08-24  Georg-Johann Lay  <avr@gjlay.de>
+ 
+ 	PR target/127024
+ 	* libf7-asm.sx (to_integer): Don't skip XJMP
+ 	if __AVR_ERRATA_SKIP_JMP_CALL__.
+ 
  2026-06-28  Georg-Johann Lay  <avr@gjlay.de>
  
  	Backported from master:
diff -Nrcpad gcc-15-20260821/libgcc/config/avr/libf7/libf7-asm.sx gcc-15-20260828/libgcc/config/avr/libf7/libf7-asm.sx
*** gcc-15-20260821/libgcc/config/avr/libf7/libf7-asm.sx	Fri Aug 21 22:32:17 2026
--- gcc-15-20260828/libgcc/config/avr/libf7/libf7-asm.sx	Fri Aug 28 22:32:17 2026
*************** DEFUN to_integer
*** 602,613 ****
      brmi    .Lsaturate.T    ;   > INTxx_MAX  =>  saturate
  
      brtc 9f                 ;   >= 0         =>  return
      sbrc    Mask,   5
-     .global __negdi2
      XJMP    __negdi2
      sbrc    Mask,   4
-     .global __negsi2
      XJMP    __negsi2
      neg     C6
      neg     C5
      sbci    C6,     0
--- 602,622 ----
      brmi    .Lsaturate.T    ;   > INTxx_MAX  =>  saturate
  
      brtc 9f                 ;   >= 0         =>  return
+ #ifdef __AVR_ERRATA_SKIP_JMP_CALL__
+     ;; Some cores have a problem skipping 2-word instructions.
+     sbrs    Mask,   5
+     rjmp    0f
+     XJMP    __negdi2
+ 0:  sbrs    Mask,   4
+     rjmp    1f
+     XJMP    __negsi2
+ 1:
+ #else
      sbrc    Mask,   5
      XJMP    __negdi2
      sbrc    Mask,   4
      XJMP    __negsi2
+ #endif /* __AVR_ERRATA_SKIP_JMP_CALL__ */
      neg     C6
      neg     C5
      sbci    C6,     0
diff -Nrcpad gcc-15-20260821/libstdc++-v3/ChangeLog gcc-15-20260828/libstdc++-v3/ChangeLog
*** gcc-15-20260821/libstdc++-v3/ChangeLog	Fri Aug 21 22:32:19 2026
--- gcc-15-20260828/libstdc++-v3/ChangeLog	Fri Aug 28 22:32:19 2026
***************
*** 1,3 ****
--- 1,13 ----
+ 2026-08-25  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	Backported from master:
+ 	2026-08-24  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	PR libstdc++/127006
+ 	* include/std/spanstream (basic_ospanstream(span, openmode)):
+ 	Add correct openmode value to parameter.
+ 	* testsuite/27_io/spanstream/127006.cc: New test.
+ 
  2026-08-18  Jonathan Wakely  <jwakely@redhat.com>
  
  	Backported from master:
diff -Nrcpad gcc-15-20260821/libstdc++-v3/include/std/spanstream gcc-15-20260828/libstdc++-v3/include/std/spanstream
*** gcc-15-20260821/libstdc++-v3/include/std/spanstream	Fri Aug 21 22:32:19 2026
--- gcc-15-20260828/libstdc++-v3/include/std/spanstream	Fri Aug 28 22:32:19 2026
*************** template<typename _CharT, typename _Trai
*** 342,348 ****
      basic_ospanstream(std::span<_CharT> __s,
  		      ios_base::openmode __which = ios_base::out)
      : __ostream_type(std::__addressof(_M_sb)),
!       _M_sb(__s, __which | ios_base::in)
      { }
  
      basic_ospanstream(const basic_ospanstream&) = delete;
--- 342,348 ----
      basic_ospanstream(std::span<_CharT> __s,
  		      ios_base::openmode __which = ios_base::out)
      : __ostream_type(std::__addressof(_M_sb)),
!       _M_sb(__s, __which | ios_base::out)
      { }
  
      basic_ospanstream(const basic_ospanstream&) = delete;
diff -Nrcpad gcc-15-20260821/libstdc++-v3/testsuite/27_io/spanstream/127006.cc gcc-15-20260828/libstdc++-v3/testsuite/27_io/spanstream/127006.cc
*** gcc-15-20260821/libstdc++-v3/testsuite/27_io/spanstream/127006.cc	Thu Jan  1 00:00:00 1970
--- gcc-15-20260828/libstdc++-v3/testsuite/27_io/spanstream/127006.cc	Fri Aug 28 22:32:20 2026
***************
*** 0 ****
--- 1,30 ----
+ // { dg-do run { target c++23 } }
+ 
+ #include <spanstream>
+ #include <testsuite_hooks.h>
+ 
+ void
+ test_pr127006_out()
+ {
+   // PR libstdc++/127006
+   char buf[3]{};
+   std::ospanstream s(buf, std::ios::openmode{});
+   VERIFY( s << 'x' );
+   VERIFY( buf[0] == 'x' );
+ }
+ 
+ void
+ test_pr127006_in()
+ {
+   char buf[3]{'x'};
+   std::ispanstream s(buf, std::ios::openmode{});
+   char x;
+   VERIFY( s >> x );
+   VERIFY( x == 'x' );
+ }
+ 
+ int main()
+ {
+   test_pr127006_out();
+   test_pr127006_in();
+ }
